[Technology Report]
Content-Addressable Memories Speed Up Network Traffic And More
Thanks to higher densities and new features, CAMs are taking on key roles in accelerating system performance.
Although content-addressable memories have been available for over a decade, their high cost and low capacities limited their use to highly specialized applications. Now, thanks to advances in processing technology and multilevel metallization, very dense, high-speed multimegabit CAMs can be economically fabricated. They're even tackling ever-more-demanding applications as features like ternary capability supplement standard binary decision capabilities.
CAM functionality also can be implemented using standard memories and a support circuit that emulates the CAM features. If capacity rather than speed is the key concern, CAMs can even be done entirely in software. This software-only approach, referred to as a virtual CAM, can be a means to reduce system cost. Alternative approaches to CAMs compete in the same application space. One such approach combines the use of standard SDRAMs and a search algorithm developed by using the company's functional protocol language (FPL).
CAMs still win out through the high acceptance they've gained in the networking and database arenas, however. They can accelerate any application that requires fast searches. Of course, many other application areas also can benefit. Image, voice, and pattern recognition are several such examples. When compared to software algorithms like binary or tree-based searches, CAMs can often deliver a tenfold or better reduction in search time. That disparity shrinks a little when the algorithms are run on latest-generation RISC engines that clock 500 MHz and faster. But even at those speeds, CAMs are still a 4X to 5X improvement over software searches.
CAM Mode Of Operation As offshoots of the basic static RAM, CAMs work in a sort of opposite manner than software. Rather than accept an address input that pinpoints a specific location and then deliver the data from that location, binary CAMs typically use the target data word as the input. They'll signal if a matching value is contained in any location. If the data is present, the chip sends out a flag signal that tells the system that it can proceed with the next operation—for example, forwarding a data packet to a node address that matched the CAM contents. If no match signal is received, the system might reload the chip with another block of data and try again. Or, it could pursue yet another search operation.
The organization of the CAM is radically different from the straightforward address-input, data-readout architecture of the SRAM. Data is stored somewhat randomly in a CAM. It could just be a simple table that's downloaded into the memory upon system startup. Or, it might be something more complex that could be adaptively updated during system operation.
An address bus can select the location that holds the desired data. Alternatively, the data could be written into the first available location. Two status bits, typically available on most CAMs, keep track of whether the data held in the location is valid. If it's no longer valid, it can be overwritten.
Once a CAM is "loaded," the desired match is found by first loading in the match value and holding it in a comparand register. Next, a simultaneous comparison takes place between the comparand and the values stored in all active locations. In traditional binary CAMs, this operation must find a 100% match with the stored data. If that occurs, the CAM chip's Match flag is asserted to let the system know that the desired data is matched (an Ethernet node address, for example).
Some system action can be taken based on the flag's assertion. For instance, packets can be routed to the node with the address that matched the table data held in the CAM. On-chip functions, such as a priority encoder, are included to help sort out which matching location has top priority if more than one match exists. The encoder then sends the address of the best match to the host.
The latest enhancement to the CAM is a ternary capability, in which one or more bit positions in the data word can be set as "don't care" values. The search operation can then find one or more "closest-match" candidates. In the network area, such a capability would allow the distribution of packets to multiple addresses on a LAN or to multiple sub-LANs.
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