[Product Innovation]
Bridge Chip Imparts A Universal Spin To CompactPCI Single-Board Computer
Designers get power and performance without worrying about the issues surrounding system and peripheral slots.
Until now, CompactPCI boards have lacked a certain degree of flexibility. For instance, system host boards were designed to work in the system slot of a CompactPCI backplane, while peripheral boards filled peripheral slots. But the PowerCore CPCI-680 from Force Computers breaks that mold. It's a "universal" board. Breakthrough PCI-to-PCI bridge technology makes it feel at home in any type of slot in the CompactPCI backplane. The board automatically switches between system or peripheral operating modes without any software or hardware changes.
Typical CompactPCI boards employ either a transparent or embedded PCI-to-PCI bridge, depending on the slot type. The CPCI-680, on the other hand, uses Force's new Sentinel chip. This chip incorporates all of the functionality of a transparent and embedded bridge, with no additional software or specialized drivers needed.
The chip also has a host of other features. It facilitates multi-computing, for instance. From a hardware point of view, all of the registers needed to support multicomputing are built into the chip. On the software side, Force is a member of the Multicomputing Standard PICMG 2.14 committee, which is standardizing the mechanism to communicate via the CompactPCI backplane. Based on standard network software, this protocol is transparent for the application whether it runs via CompactPCI or Ethernet. "The idea is really to have a fast communication link via CompactPCI," says Christoph Adam, technical marketing manager for Force Computers. "It's important to be processor- and operating-system-independent."
Those multicomputing features also are evident in the chip's support of intelligent I/O (I2O). Large FIFO memories are built into the chip for even faster communications via the backplane.
Another benefit of Sentinel is availability support. This term refers to the chip's support of hot swap not only for intelligent I/O boards, which already exists with embedded PCI-to-PCI bridges, but also for the non-intelligent ones. These boards typically use a transparent bridge that lacks the hot-swap registers for CompactPCI. Because Sentinel has these registers built in, it can be used to design a hot-swappable, non-intelligent I/O board. This is an indication of one possible use for the Sentinel chip in the future, since Force has no plans to market the chip by itself.
The company paid specific attention to increasing the chip's I/O bandwidth. To achieve high data throughput, Force has placed deep buffers on the chip to collect a lot of data and then send it over the CompactPCI backplane.
Another significant aspect of the chip is its support of message-signaled interrupts (MSIs) as defined in PCI specification 2.2. To avoid bottlenecks in real-time mission-critical systems, the Sentinel chip doesn't have to use the four interrupt lines on the CompactPCI backplane to indicate a service request to the processor. Instead, through the MSI feature, a chip in a peripheral slot utilizes a PCI memory write access over the CompactPCI bus. It writes to the Sentinel on the system-controller board. This board initiates a local interrupt, assuring predictable response times even for 16-slot systems.
Adam also pointed out a factor that Force refers to as longevity. To the company, this means true embedded life-cycle support. It does its designs in-house and has its own ASIC team. He states that in essence, Sentinel is backed by Force's proven track record and commitment to the embedded market.
"The idea is to have a silicon roadmap, not just standalone silicon," notes Adam. Force wants to react quickly to new trends, technologies, and interfaces and integrate these into the next revision of the chip. An architectural overview of the chip is shown in Figure 1.
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