Whether it's the latest cell phone or a large space telescope, solid-state imaging devices now fill nearly every image-capture need. Smaller pixel sizes enable existing VGA and multimegapixel sensors to shrink, while still larger sensors with tens of millions of pixels are readily manufacturable. Over the last few years, CMOS-based image sensors became the technology of choice for consumer products. They've won the economic and performance battle over charge-coupled-device (CCD) sensors for imaging devices with resolutions ranging from sub-VGA to about 8 Mpixels. Above the 8-Mpixel mark, though, CCDs still dominate due to their lower noise and better sensitivity. See Figure
CCD sensors reign supreme in industrial and medical applications, too, since many applications require high frame rates instead of high resolution. Chip architectures span the range from simple linear arrays of a few thousand pixels to multimegapixel arrays. Fairchild Imaging, Fraunhofer-IMS, Hamamatsu, Kodak, and Sarnoff Labs all offer solutions in this market.
CMOS-based sensors leverage the process scaling of CMOS technology and the ability to better integrate logic functions, such as image processors and analog-to-digital converters (ADCs), to create a full "camera-on-a-chip" solution. With pixel sizes for CMOS sensors already dropping to below 3 µm on a side, designers can craft smaller VGA-resolution sensors or multimegapixel sensors with the same chip size as previous-generation VGA sensors.
Also, automotive safety applications will start to consume significant numbers of low-cost imaging devices over the next few years. Backup cameras, drowsy driver alerts, airbag deployment, and other applications will use image data to better protect drivers.
Further advances in lithography and pixel design will allow for additional scaling, enabling designers to craft devices with even higher resolutions. The challenge will be in maintaining pixel-cell sensitivity as the light-capturing area shrinks. Also, if the captured light energy is lower, then the amount of background noise must be lowered to effectively maintain a sufficient signal-to-noise ratio. As a result, process developers must pay careful attention to reducing thermal noise and other noise sources inherent in the semiconductor materials to improve the signal-to-noise ratio.
In a CMOS sensor, each pixel has its own charge-to-voltage conversion. The sensor often includes amplifiers, noise-correction, and digitization circuits so the chip outputs digital bits. These other functions increase the design complexity and may reduce the area available for light capture. With each pixel doing its own conversion, pixel-to-pixel uniformity is lower. But by using on-chip logic, the chip can be built to require less off-chip circuitry for basic operation.
Processes used for CCD sensors aren't as flexible, and most CCD sensors require considerable external support circuitry. CCDs traditionally provide the performance benchmarks in the photographic, scientific, and industrial applications that demand the highest image quality (as measured in quantum efficiency and noise) at the expense of system size.
CMOS VERSUS CCD TRADEOFFS No clear line divides the types of applications that use CMOS and CCD sensors (see "Comparison Of CCD And CMOS Imaging Sensors" at Drill Deeper 11898, www.elecdesign.com). While CMOS designers devote much effort toward achieving high image quality, CCD designers focus on reducing power requirements and pixel sizes to compete with CMOS devices at the lower end of the product spectrum. The main advantage of CMOS sensors will be low cost, since the sensors can leverage mainstream CMOS manufacturing capabilities.
At the high-end of the imaging area are CCD imaging devices with capacities ranging from 14 to over 81 Mpixels. (For more about these high-end solutions, go to "CCDs Replace 35-mm Film" at www.elecdesign.com, Drill Deeper 11899.) Between 14 Mpixels and 5 Mpixels, designers have a choice of both CMOS and CCD imagers, with the bulk of the solutions in CMOS. And there still are a few CCD imagers below 5 Mpixels, but they're getting harder to find as CMOS imagers totally dominate that portion of the market.
CMOS: UP TO THE TASK One of the more unusual approaches in creating a CMOS imager comes from Foveon. Rather then use a singe layer of pixels covered by a layer of color filters, the X3 architecture employs three layers of pixels in the silicon (Fig. 1). This direct image-sensing approach directly captures the red, green, and blue light at each point in an image during a single exposure. A single pixel region then can capture all three primary colors. In contrast, most CCD and CMOS sensors use layers of color filters on top of the pixels that form a mosaic of three-pixel clusters to capture the three primary colors. The Foveon scheme exploits the fact that different wavelengths of light are absorbed to different depths in the silicon. Therefore, each vertical stack of red, green, and blue pixels directly records all of the light at each point in the image.
The largest X3 sensor packs 10 Mpixels. Its vertical stacking of the pixels is considerably smaller than a traditional X-Y array that uses the color filters. The sensor also uses little power, suiting it to many digital still cameras (DSCs). With a 2.5-V supply, it draws 50 mW during readout, 10 mW during standby, and 0.1 mW during power-down.
One pixel region does the job of three. And thanks to a variable pixel size feature, the sensor can seamlessly switch between capturing still images at maximum resolution and digital video at reduced resolution. That tradeoff is achieved via control signals that group adjacent pixels into clusters such as 1-by-2, 2-by-2, or 4-by-4 blocks.
The bigger the block, the greater the sensitivity, since more pixels collect light for the same point on the image. In its full-resolution mode, the sensor can capture 4.4 frames/s. In 576-by 384-pixel resolution mode, it captures 25 frames/s.
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