[Design View / Design Solution]
Follow Heuristic Guidelines To Make Surface-Mount PC-Board Footprints
These rule-of-thumb specifications will keep your anxiety level low and your prototype design first-pass success level high.
Are you designing a pc-board (PCB) layout containing ICs or other components, but your PCB-layout software lacks footprints? Don't stress! Although it won't be optimized for production, you can quickly and easily create a PCB layout-package footprint that's suitable for prototyping.
Starting with only the data sheet's package-dimension mechanical drawing, the guidelines that follow will enable you to quickly generate the needed PCB apertures, such as top copper footprint, solder-mask-stop apertures, and solder-paste-stencil apertures. Normal caveats regarding optimization for production apply, but these guidelines will help you get your prototype designs into the lab for testing.
Some engineers lament that the days of "breadboard" prototyping are gone, along with the ability to quickly test and prove-out circuit ideas in the lab. Baby-boomer engineers fondly recall going from paper-napkin circuit sketches done in the evening to perfboard or wire-wrapped circuit prototypes built in the lab the next day, allowing them to verify operation and take waveforms to test out their concepts on the bench. (This did not mean, however, that they practiced willy-nilly wiring. Even before broadband, designers carefully considered component placement and reasoned out the routing of signal wires to prevent crosstalk, stray inductance, and stray capacitance from adversely affecting circuit operation). However, today's fine leadpitch small-outline integrated circuit (SOIC) and quad flat no-lead (QFN) package technologies are inherently unfriendly to hand soldering, and signal bandwidth is too high to be compatible with point-to-point "rat's nest" wiring. In addition, many semiconductor components—ASICs in particular—only come in surface-mount form. Therefore, prototyping with a dual-inline package before designing in an SOIC often isn't an option. Even if there are hand-solder-friendly packages, there may be differences in signal propagation and phase relationships between the prototype and the higher-density layout of a production design.
QUICK-TURN PCBs A PROTOTYPING PARADISE Sophisticated PCB CADlayout software has long since replaced the tedious, manual " tapeout" creation of PCB artwork wherein tape and adhesive-backed footprintpuppets were manually stuck down to mylar sheets in a 2 or 4 enlarged layout (for later photographic reduction and to create the 1:1 contact exposure film).
Now, engineers can automate the trial-and-error process of routing traces. The latest CAD software offers intuitive graphical user interfaces, plus it supports importing component and wiring information (that is, netlist information) from associated schematic-drawing (schematic-capture) programs.
These schematic-capture/PCB-layout software packages—when combined with an Internet-based, quick-turn PCB prototype house—can bring back the rapid breadboarding capability of yesteryear and still yield a prototype that closely resembles the final design. There are a number of software packages to choose from that cost less than a business lunch and take only a few hours to learn. Many include libraries of thousandsof common parts, eliminating the need to physically pick parts from bins and stuff them into perfboard.
The CAD-enabled path to a prototype is quick and easy with these five steps:
Start by drawing the circuit using the schematic capture software, picking components from the included libraries and connecting the wires and buses.
Import the captured circuit schematic to the PCB-layout software and move the component packages around for the least-tangled rat's nest. Then route the wires and have the software generate the CAM files.
Order the boards and solder stencil online. Upload the CAM files.
Once you have received the boards, you can start stenciling.
Assemble the prototypes.
Because the assembly step is expeditedby having the PCB, it more than makes up for any additional time required up front capturing the schematic and laying out the circuit. In fact, by using a solder stencil to screenprint the solder paste onto the PCBs, assembly becomes a simple matter of placing the components on the corresponding footprints and placing the board in a reflow oven. (Note: a dedicated "toaster oven" is adequate to the reflow task.)
PROBLEMS IN PROTOTYPING PARADISE? You may find that some of the parts required by your design don't exist in the software's library, but this is really quite common. (ASICs and new or unique devices may not be found in a PCB layout program's libraries of popular components.) In such a situation, the circuit-designer/would-beprototyper must create the device within the software package's libraries.
This includes not only the PCB copper footprint, but also the artwork for the solder stencil, solder masking, silkscreen legend, and component placement and orientation. However, a typical double-sided board will contain several unique layers associated with each component. There's no need for alarm, though. The task of creating the devices missing from the library isn't daunting if approached step-by-step.
COMMON REQUIREMENTS FOR TW0-LAYER BOARDS Start by defining the layers of a PCB component footprint. On the top of the board ("component side"), the requisite artwork layers are top copper, top solder-mask stop, top solder stencil, and top silkscreen legend. Common optional top layers may include component centroid/origin and documentation layers.
The top copper layer is, of course, the essential layer that establishes the copper areas where the device's solder connections are made. The top solder-maskstop layer's artwork prevents the liquid photo-imageable (LPI) solder-mask lacquer from covering the areas to be soldered. The top stencil layer (top cream layer) provides the aperture pattern for the openings in the thin stainless-steel stencil that "prints" the solder paste onto the associated area of the top copper layer. The silkscreen legend layer contains the artwork for the component outline and orientation, device ID, and part number.
The origin (part centroid layer) provides information to be used by pick'n'place equipment, and the documentation layer is commonly used to give a top view of the device. Neither layer appears on the physical board.
The data sheet for a device may or may not contain a drawing of a recommended footprint for the device's package. (If it does, then you would simply recreate the pad dimensions and pattern in the top copper layer.) But this information may be found in publications other than the device data sheet. Freescale Application Note AN2409, for example, provides footprintdimension data for whole families of fine-pitch SOIC packages.
We'll assume that a footprint drawing isn't supplied as we go through the step-by-step process of creating a surface-mount PCB footprint in a PCB-layout software program. For this exercise, we'll use the example of a power quad-sided flat no-lead (PQFN) package.
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