The transition from diodes to synchronous-rectification (SR) MOSFETs in secondary circuits of flyback converters increases with each new generation of MOSFETs, improving performance at little or no cost penalty. SR MOSFETs can be more efficient than diodes, allowing lower operating temperatures and smaller heat sinks, or no heat sinks at all. However, they require a control circuit to manage their switching behavior in order to emulate a diode. The usual synchronous rectifier control method in today's commercial power supplies involves deriving the logic signal for the controller from the secondary of a current transformer. There is a better way, though.
Flyback History Traditionally, flyback converters were well suited for applications requiring power levels less than 150 W. Their major appeal was simplicity and low cost. Beyond 150 W, and certainly at power levels of 200 W and beyond, the half-bridge- and forward-converter were the standard topologies. The major problem with flybacks, whether they were implemented with diodes or SR MOSFETs, was semiconductor conduction losses.
As with all isolating power-converter topologies, flybacks employ a transformer on the secondary, on which resides a rectifier. The simplest configuration uses a half-wave rectifier diode on either the high or low side (Fig. 1a). Synchronous rectification combines a MOSFET with some kind of control for turning the device on or off so that it emulates the diode commutation of the ac from the transformer. The synchronous approach provides greater efficiency, albeit with a corresponding tradeoff in complexity and cost (Fig. 1b).
What kind of losses are we talking about? For a diode, the forward-conduction power loss is simply the product of the forward voltage and current. For a MOSFET, it's I2 RDS(ON). When a diode has a standard 0.6-V VF, a 4-A current turns 2.4 W into heat. And, if a MOSFET's RDS(ON) = 10 mΩ , the loss at 4 A is 0.16 W (see the table).
At 4 A, the MOSFET dissipates 93% less power, leading to a lower junction and case temperature, meaning that it requires either a smaller heat sink or no heat sink at all. Theoretically, for the diode and MOSFET characteristics in the example, power-loss parity doesn't occur until current reaches 60 A. In practice, long before you reach power-loss parity in a real circuit, you would choose a MOSFET with a lower RDS(ON), parallel a pair of devices, or choose a different architecture.
Synchronous Rectifier-MOSFET Control Though SR brings significant efficiency and thermal-management advantages over diode rectification, those advantages don't come for free: You need a gate-control signal to properly operate the FET. A popular approach to gate control uses a current transformer, a comparator, and a gate-driver stage. A simplified schematic of this arrangement appears in Figure 2a.
The current transformer senses the secondary current, imposing scaled copy on its load impedance, which results in a voltage proportional to the current, preserving the polarity information. The comparator detects this voltage and turns on the MOSFET through the driver when the secondary current conducts in the forward direction.
Though conceptually simple, the current-transformer-based SR control presents a few challenges. The first derives from the fact that transformers, be they voltage or current transformers, are ac-coupled devices. The current transformer's secondary signal, therefore, is bipolar, so the downstream signal processing must take that into consideration. This complicates the power-transformer design by an additional secondary-winding segment and adds a rectifier and filter to strike a second rail for the comparator and driver.
The second challenge is that in its full implementation, this circuit requires as many as 15 components. These components, and their associated routing, require a large pc-board area comparable to that of a feedback control circuit.
A third challenge relates to timing. As an analog signal processor, the current-transformer-based SR control?s performance is subject to the variations of many of its components over their operating temperature range, as well as to the current transformer's parametric distribution over a production run.
Delays through the current transformer and further delays due to parasitic capacitances at the comparator inputs prevent this circuit from responding to the current-polarity change as quickly as the simplified schematic might suggest. A measurable lag occurs, therefore, between the current's zero crossing and the time when the driver shuts off the switch. During this interval, reverse current steals charge from the bus capacitor, reducing efficiency and increasing output ripple. Indeed any secondary circuit that allows reactive energy to slosh back and forth between the transformer and bus capacitor suffers in this way, so tight timing to the current's zero crossing is critical to a highly efficient secondary circuit.
Finally, commercial IC implementations use phase-locked-loop (PLL)-based circuits, the major limitation of which appears to be in transient response due to the primary side's variable-frequency control.
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