Electronic Design

  
Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


[Technology Report]
Digital ICs: DSP

Ashok Bindra, Dave Bursky  |   ED Online ID #1423  |   January 7, 2002


Harnessing The Power Of DSPs
Before semiconductor building blocks or single-chip solutions came on the scene, digital signal processing (DSP) problems, primarily in the military arena, were solved using DEC minicomputers and IBM mainframes. With the emergence of semiconductor multipliers, accumulators, registers, and logic, these nonreal-time imaging and filtering problems slowly and steadily shifted to DSP building blocks in the early '70s. Despite these advances, commercial applications were unthinkable. No one envisioned that this technology would one day revolutionize the communications world and enable many other applications.

All of that changed with the first single-chip DSP created in 1978 by AMI and soon after by AT&T and NEC Microcomputer (www.nec.com). DSP pioneers had laid the groundwork for a new industry, which got the needed shot in the arm by the first commercially successful DSP chip from Texas Instruments (www.ti.com) in the early '80s. From then on, nothing would stop this marvel. DSP rapidly expanded beyond its traditional role into countless untraditional applications. It has mushroomed into a several-billion-dollar market that keeps growing.

Today, with the power to perform billions of instructions per second from a tiny package at a supply voltage that can be delivered by a battery at an affordable price, electronic appliances can process images and video on a real-time basis. From digital cameras to video conferencing, DSPs are fueling every conceivable application. As this technology evolves and moves forward, its reach is left to the imagination of developers.

DSPs will become more reconfigurable to meet future needs. We can also expect more powerful cores driving such chips with hundreds of processing elements (PEs). The future will bring multicore designs for broadband communications, a greater interaction between DSP and field-programmable gate array (FPGA) designs, more powerful fixed- and floating-point DSPs, high-level DSP programming languages, improved development tools, and system-level integration. The DSP will become as fundamental a computational element of electronic circuits as the microprocessor.


Because standards are changing rapidly and processing horsepower needs are rising quickly, traditional programmable DSP processors may soon run out of steam. To meet these needs, dynamic reconfigurability with dramatic improvements in power and code efficiency are being pursued. Several reconfigurable DSP architectures, with parallelism at the computational and instruction levels, have been proposed. Depending on the applications, designers will be able to configure the computational units and parallel datapaths, as well as map instruction sets with the architecture to maximize code density with minimal power consumption. Plus, such reconfigurable processors will offer shared-memory accesses to keep the power consumption low. Being highly programmable and adaptable, adaptive computing machines (ACMs) will offer an alternative to traditional DSPs.


Many emerging portable applications require a DSP processor and high-performance RISC combination to handle signal-processing and control tasks separately. Developers combine these two cores on the same die and add a rich set of peripherals, serial interfaces, I/Os, and the correct amount of memory to cut size, power, and system costs. Moreover, to ensure true open-source flexibility, they're supporting embedded OSs like Linux.


To tackle monumental signal-processing tasks of forthcoming broadband multichannel infrastructure equipment, and high-density voice-processing boards used in communication gateways, developers are readying multicore designs with multiple identical DSP cores connected in highly parallel formats. Each core is a powerful DSP engine in this architecture.


FPGA makers have been eying DSP applications for some time. Now they're becoming more aggressive because FPGA densities have soared to new levels and development tools are in place. In fact, they're developing methodologies to help DSP engineers transfer their skills to programmable logic devices

Toward this new end, FPGA makers are crafting seamless design flows that link their software directly to The Mathworks' algorithm development tool, Simulink. In addition, they're offering comprehensive development kits for designing, prototyping, and debugging high-performance DSP applications. In fact, some have targeted software-defined radio (SDR) applications, asserting that programmable devices deliver performance with flexibility. They can provide a configurable radio for multiple wireless standards.

Also, suppliers say that FPGAs and PLDs can perform multiple-accumulate operations two orders of magnitude faster than traditional DSP devices. Similarly, they perform finite-impulse-response (FIR) filtering, fast Fourier transforms (FFTs), and other DSP tasks much faster.


<-- prev. page     [1] 2     next page -->

Reprints   Printer-Friendly  Email this Article  RSS    Font Size   What's This?



POST YOUR COMMENTS HERE
Name:

Email:
Your Comments:

Enter the text from the image below


Please refresh the page if you have trouble reading this text.

Search Electronic Design
     
  
 
Web Seminar
Sponsored By:
Title: Read Pacing: A Performance Enhancing Feature of PCI Express Gen 2 Switch Devices
Speakers: 
Date: 07/01/08
Register: 

Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF
Mobile Dev & Design Schematics Find Power Products Military Electronics EE Events Related Resources