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[Forefront]
Nonvolatile Memory Cuts The Price Of Digital Storage

Dave Bursky  |   ED Online ID #1467  |   January 21, 2002


A 3D write-once memory structure from Matrix Semiconductor Inc., Santa Clara, Calif., promises to achieve a cost so low—just $0.02 to $0.03 per megabyte—that the cost of a 64- or 128-Mbyte memory card will be competitive with a roll of film or a good-quality cassette tape.

Optimized for consumer applications, it's based on a novel polysilicon diode and antifuse combo storage element interconnected with polysilicon bit and word lines. This replaces the traditional thin-oxide, transistor-based memory element found in flash cells from almost every flash-memory manufacturer.

The structure allows a 64-Mbyte memory to store over an hour of MP3-encoded music, or over 65 3-Mpixel digital images. Denser chips or memory cards with multiple chips are possible. Read and write speeds will be comparable to NAND-based flash storage.

The simple structure consists of an array of polysilicon diodes and one-time programmable antifuses. The array is fabricated in a polysilicon layer deposited above the base wafer. The wafer holds all memory-array control and access circuits.

The simple masking, processing, and interconnect requirements of the diode array allow multiple polysilicon layers to be stacked atop each other. The first product will stack eight layers of storage cells above the CMOS logic circuits in the base wafer.

Matrix Semiconductor will initially release a 512-Mbit memory whose cells are organized into subarrays. Eight subarrays are on each layer. Each subarray contains a block of 8 million memory cells. Below the subarrays on the CMOS wafer are all of the peripheral support circuits needed to address, decode, read, and write to the subarrays (see the figure).

For more information, check out www.matrixsemi.com.


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