Electronic Design

  
Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


[Engineering Essentials]
So, What Was That Memory Technology Again?

Daniel Harris  |   ED Online ID #15558  |   May 24, 2007


Fast-forward to the year 2017. You turn on your tablet PC and, like a Palm Pilot, it's instantly up and running right where you called it quits on your last search. There are no buzzing hard drives or fans, and all of the data is written to and read directly from the memory inside the device.

You're probably thinking that this isn't any big deal. It may seem like I've simply described a laptop with RAM used for temporary storage and some kind of flash memory replacing the magnetic hard drive. Not even close. That technology is expected this year.

Instead, the future PC will contain a single "universal memory" that will be fast enough to eliminate the need for temporary storage. It will also be large enough to handle all your multimedia needs and still run cooler and require less energy than any of today's memories.

Many scientists believe it will be possible to use carbon nanotubes (CNTs) for system memory in the near future and complex logic farther out (see "Back To Nature For Next-Gen Semis"). For example, professor Qing Jiang of the University of California at Riverside and his research partner Jeong Won Kang discovered a multiwalled CNT structure that consists of an outer tube and inner tube that can oscillate at a high frequency with a voltage stimulus. The inner tube's position indicates the nonvolatile logic state (Fig. 1 and 2).1

One company looking to provide an intermediate step to Dr. Jiang's future vision is a startup named Nantero, which employs CNT technology to build novolatile, nanotube-based RAM (NRAM). The company hopes NRAM will replace DRAM, SRAM, flash, and hard disks. With NRAM, memory cells are constructed using several CNTs suspended above a metal electrode. When a small voltage bias is applied to the tubes, they "sag" toward the electrode until making contact. At that point, the tubes are considered in the logic 1 state. When the voltage bias is removed, they pull back away from the electrode and the logic state becomes 0 once again.

Because the technology is built on top of standard semiconductor technology, NRAM's many benefits will include speeds approaching SRAM, densities that far exceed DRAM, and lower power consumption than DRAM and flash. NRAM also stands up well to harsh environments and scales well. In fact, Nantero created a working 22-nm memory switch and expects production, albeit using a larger process, to ramp up later this year.

Fujitsu, Intel, Samsung, Sharp, Spansion, and several other companies are woring on resistance (or resistive) RAM. Also known as ReRAM or RRAM, this nonvolatile memory is built using metal oxides like titanium dioxide (TiO2). Current paths (in the form of filaments) appear in the TiO2 film when a sufficient voltage bias is applied. The filaments may then be broken (reset), resulting in higher resistance, and reformed (set) with the appropriate voltages.

These companies feel it will be 100 times faster than flash, yet scale much better than other advanced memories like phase-change RAM (PCM or PRAM) and magnetoresistive RAM (MRAM) (see "New And Emerging Memory Technologies,"). Intel has since announced at its Intel Developer Forum in April that it plans to go into production with PCM later this year.

CURRENT EXTERNAL MEMORIES
If your system requires external memory (as most systems still do), your choices are virtually limitless (Table 1). So, how do you decide which memory technology is best for your design? The best place to start is likely the protocol or protocols you've selected for your design. Whether it's a standard or proprietary protocol, several factors, including speed and bus configuration (parallel or serial), dictate a starting point (see "High-Speed Serial Technology Drives Board Interconnects,").

Next, you need to consider a slew of parameters, such as volatility, the number of times the memory can be written, type of application, read and write speeds, cost per byte, and amount of memory required (Table 2). Other major considerations include form factor, package pinout, and scalability. For example, if you select a parallel architecture, you should consider how the address and data lines are designed, how many other manufacturers have drop-in replacements, and how your printed-circuit board (PCB) will be updated if more address and data lines are needed in the future.

The tradeoffs don't end there, though. Many advances in memory technology over the past few years presented several more considerations. For instance, Samsung and SST offer hybrid memories that incorporate a mix of volatile and nonvolatile technologies, such as flash and RAM. SST's new hybrid All-in-OneMemory even combines the benefits of RAM, NAND flash, NOR flash, and a memory controller in one device (see "I Wish My Memory Were As Dynamic As the All-inOne Memory,").


<-- prev. page     [1] 2     next page -->

Reprints   Printer-Friendly  Email this Article  RSS    Font Size   What's This?


  • Engineers Rely On Internet For Product Info
  • Rochester Electronics Establishes New Design and Technology Group
  • Custom Sources Light Way To 22-nm IC Lithography
  • In EDA, A Year Of Mergers, Failed And Otherwise
  • Software Turns Scopes Into Vector RF Signal Analyzers
  • Couple’s $15 Million Gift Advances Rice Engineering Education
  • November 7, 2008
  • Startup Sets Sail For Speedier Spice Simulation
    1) Ten Top Design Skills For Tough Times
    (8480 views today)
    2) Energy Harvester Perpetually Powers WIreless Sensors
    (627 views today)
    3) Ultracapacitors Branch Out Into Wider Markets
    (593 views today)
    4) Technology Has Been Very Good To Obama, And He Plans To Reciprocate
    (438 views today)
    5) Build A Smart Battery Charger Using A Single-Transistor Circuit
    (308 views today)
    ALL TOP 20



    Reader Comments

    Very interesting article with links to other good stuff!

    Rob Uiterlinden -May 25, 2007   (Article Rating: )

    POST YOUR COMMENTS HERE
    Name:

    Email:
    Your Comments:

    Enter the text from the image below


    Please refresh the page if you have trouble reading this text.

    Search Electronic Design
         
      
     
    Web Seminar
    Sponsored By:
    Title: Read Pacing: A Performance Enhancing Feature of PCI Express Gen 2 Switch Devices
    Speakers: 
    Date: 07/01/08
    Register: 

    Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF
    Mobile Dev & Design Schematics Find Power Products Military Electronics EE Events Related Resources