Electronic Design

  
Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


[Ideas For Design]
Create RS-485 Adapter To Convert Data Lines From Full- To Half-Duplex

Massimo Caprioli  |   ED Online ID #15739  |   June 21, 2007


Multiprotocol interface ICs can be used to connect a UART to an RS-485 bus architecture called point-to-point full-duplex (PTP-FD). The PTP connection usually requires drivers and receivers to be constantly enabled, and therefore "present" on the line. So when such a circuit board must fit into a point-to-multipoint, half-duplex system (PTM-HD), the entire board (usually) must be redesigned.

A simple trick, though, can adapt an existing PTP-FD board, which provides a single link between two terminals, for use in the more complex PTM-HD architecture. PTM-HD involves one master and multiple slaves, connected by multiple links. This adapter makes it possible to reuse the hardware already designed and manufactured.

A PTP-FD slave board is always ready to "hear" interrogation/command signals from the PTM-HD master unit, but it answers only when it recognizes its own address. To avoid any effect on the signal-transmission path of the half-duplex side, the adapter, which operates only on the slave board's Tx output, maintains itself in the quiescent state. Only when a slave output starts to transmit does the adapter become active and transfer that data to the central unit.

The adapter circuit consists of two devices (Fig. 1). The RS-485 receiver, IC1a, is always enabled. It senses the Tx output of the PTP slave board, drives the timer (IC2), and enables the RS-485 transmitter (IC1b), which is typically in a quiescent state. The triggering occurs when the slave board Tx output makes a high-to-low transition (a start bit). The timer's En DRV signal enables the transmitter, maintaining the En DRV state for a time interval determined by the delay capacitor.

The timer is retriggered by the next high-to-low transition (data bit) of the input signal (Fig. 2). The value of the delay capacitor depends on the Tx input transitions coming from the PTP slave board, the time between data packets, and the switching time between channels (the slave boards to be addressed).


Reprints   Printer-Friendly  Email this Article  RSS    Font Size   What's This?


  • Network-On-Chip Tools Arrive for The Masses
  • Tackling System Design Challenges Through Early Verification
  • ESL Tools Take Center Stage As Designers Move Up
  • Parasitic Extraction Tool Targets Next-Generation Custom ICs
  • Synopsys Jumps Into ESL-Synthesis Pool
  • Verify Control Systems Before Committing To Hardware
  • You're Using How Many FPGAs?
  • Tool Up For The FPGA Blitz
    1) Build A Smart Battery Charger Using A Single-Transistor Circuit
    (178 views today)
    2) Hot Hands For Some Cool Rock: Motion Sensing Meets Audio Engineering
    (167 views today)
    3) Science Fiction Meets Science Fact In Today's Robot Research
    (98 views today)
    4) What's All This Transimpedance Amplifier Stuff, Anyhow? (Part 1)
    (89 views today)
    5) GPS-Derived Grandmaster Clock Delivers Ultra-Precise Time And Frequency Sync
    (86 views today)
    ALL TOP 20



    POST YOUR COMMENTS HERE
    Name:

    Email:
    Your Comments:

    Enter the text from the image below


    Please refresh the page if you have trouble reading this text.

    Search Electronic Design
         
      
     
    Email Newsletter
    Sponsored By:
    Electronic Design UPDATE provides readers with late-breaking news, opinions from industry experts, and timely technology stories. It's a unique opportunity to get your product message in front of engineers, engineering managers, and corporate managers while they're reading about critical information online.

    Enter Email to Subscribe
      

    Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF
    Mobile Dev & Design Schematics Find Power Products Military Electronics EE Events Related Resources