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[Mark David's Blog]

Peaks And Valleys: Power Efficiency Is Ubiquitous



Mark David  |   ED Online ID #17142  |   September 28, 2007

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Coming down the ice fields of Mt. Rainier, stomping down on my crampons to make sure all the teeth were grabbing into the slopes, you might think that power efficiency and electronic design would be the furthest thing from my mind.


But since we had summited after sunset and were now coming down the ice by headlamp in the dark, I was keenly aware of the sub-par battery life in my old-school (incandescent) headlamp. It had been five years since I last went mountain climbing, and in that interim, everyone had moved to LED headlamps, given their superior illumination and extended battery life. Luckily, I had remembered an extra set of batteries and could “refresh” power at a rest break. But it was a clear reminder of the importance of power in portable devices (and that it’s time to get a new headlamp if I’m out climbing at night again any time soon).


The climb was an awesome experience. Getting to the top of Rainier was something that had been on my “life goals” list since I had lived in Seattle, and the magnificent mountain had been one of my motivations for joining the Mountaineers Club to learn the basics of climbing. Signing up with guiding company Alpine Ascents was a great way to increase the likelihood of summiting, and, indeed, seven out of eight in our group made it to the top.


While I was in the Seattle area, I stopped into see Impinj , a company that is on the leading edge with power savings as related to nonvolatile memory (NVM).  Impinj’s one-time and multiple-time-programmable NVM cores are produced in advanced logic CMOS processes with no additional masks or process steps required. The company’s AEON cores reduce system power, cost and size by integrating NVM into system chips.


After Seattle, I headed down the coast to San Jose to attend the Fabless Semiconductor Association (FSA) meeting in Santa Clara, where power management was also a central theme. LSI CTO Dr. Claudine Simson described in her keynote the opportunities in storage and networking to manage “server sprawl,” by focusing on virtualization and higher server utilization. The new wave of mega data centers, she said, means that billions are spent on server cooling and power. To address this, The Green Grid is an association that looks at the best practices to reduce power consumption and the interaction between servers and data centers. Simson noted that in the typical electronic device, 50% of power is used by memory. The design community has major opportunities to improve power performance with new memory technologies. She also noted that that optimizing analog and mixed signal can reduce i/o and that a “silicon to systems approach” can create major power savings as well. The end goal, she said, is true systems design from the chip manufacturer, not reference designs.


Rick Cassidy, president of  TSMC North America, echoed this theme with his keynote focused on “zero degrees of separation” between design and manufacture. The company’s focus on DFM and “active accuracy assurance” means that power savings are designed into the front-end as the design process evolves. Cassidy announced that 45 nm wafers would be available this month. The company is also building two new “gigafabs,” representing a $10 billion investment.


Also in Santa Clara that week (Sept. 10) was Cadence’s CDN Live, an event really gaining momentum in the EDA community. Electronic Design was proud to contribute to the success of the event with a media sponsorship, and as part of that we created a microsite where you can see videos and other highlights from the event.


One of the secrets of CDN Live’s success is that the seminar program is put together by a committee of Cadence users who determine what topics will be most useful to the  community. I met Michael Catrambone from UTStarcom who heads the steering committee. He explained that the initial mix of 17 companies was selected to represent a wide variety of companies. Mike says the event is taking off, as this year there were 280 abstracts submitted and the best of those were boiled down into the 9 tracks represented at the event. Power management was an underlying theme here, too, as hot seminar topics included how to build  power management into the DFM process.

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Cadence cranked up the power, though, for a great party that featured a Cadence-employee rock band. Rock bands seem to make great entertainment at engineering events, the perfect blending of performance and electronic technology.


Back home in New York, though, I had an eye-opening experience when I took my son to see a “mash up/mix” artist – a one-man act called Girl Talk. Unlike a DJ who might heat up the crowd with “two turntables and a microphone,” Girl Talk stars a kid at a laptop, with little to do in a live setting other than watch the “streaming bar” on the computer screen.


The audience packing the house was in a fervor, though, reacting just as if it had been a live show. The bouncers allowed the kids to climb up onto the stage and totally surround the performer. At that point, Girl Talk had merged into the crowd and the bouncers were seemingly protecting the laptop on stage. Maybe this is where the future is heading: kids packing into a club, turning on a computer and mobbing the stage for the programmer who mixed the content. Looks like design engineers may get the celebrity they deserve before long!




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