| EDA Alert e-Newsletter |
February 5, 2008 |
Webcast: Optimize Low-Power Design
Mentor Graphics Jon McDonald, TME, will discuss gains to design low-power SoC at levels of abstraction above RTL and look at how tools and methodologies are evolving to suit optimizing for power. Discuss IP reuse concepts enabling designers to build TLM SoC platforms accommodating accurate power assessment and power optimization. Registration Feb 13 at 2:00pm EST
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Keys To Improving Yield
By Jim Kramer, Product Manager, Fabrication Analysis Business Unit
Magma Design Automation
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Closer, more coordinated interaction between IC design and manufacturing teams is the key to improving product yield. Although many IC manufacturers are trying to institute true design for manufacturability (DFM), more effective collaboration with their design counterparts is necessary to overcome numerous issues that impede success.
Read the full article...
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Low-Power Reference Flow Targets UMC's Advanced 65-nm Process
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Magma Design Automation's reference flow for UMC's advanced 65-nm process enables designers to address low-power nanometer design considerations during implementation and within a single environment. UMC's validation of the reference flow included QoR testing on real-world designs.
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Pair Collaborates On System-Level SoC Verification
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DAFCA and GiDEL have agreed to work closely to extend and enhance the integration of GiDEL's reconfigurable PROC systems and DAFCA's ClearBlue reconfigurable instruments. Basically, the two companies look to take one part on-chip reconfigurable instrumentation IP, one part off-chip analysis tools, and one part board-level acceleration hardware to fabricate a comprehensive suite of system-level SoC verification and debug tools.
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FPGA Physical Synthesis Tool Expands Its Reach
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Now optimized for Xilinx Virtex-5 FPGAs, Release 9.0 of Synplicity's Synplify Premier physical synthesis tool adds support for Altera Stratix-III, Stratix-II, and Stratix-II GX FPGAs through the company's Synplify Premier Beta Program.
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Accelerated Libraries Speed C Synthesis For Virtex-5 FPGAs
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The Catapult C Synthesis accelerated library for Xilinx 65 nm Virtex-5 FPGAs features a pushbutton flow, delivering significant DSP Fmax performance improvements in the order of 50-80% over standard libraries, according to Mentor.
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|  DesignCon 2008 - Your Design Connection Awaits!
DesignCon attracts engineering professionals from various levels and disciplines and represents many aspects of electronic design: applications engineering, architecture and systems design, ASIC design, circuit-board design, embedded-systems design, hardware/software integration, high-performance systems, IC design, packaging, semiconductor product management, service and support, SoC design, software development, testing and debugging, and more.
Please visit: http://www.designcon.com/2008/register/index.asp
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Last month, Richard Branson unveiled SpaceShipTwo. If you had a spare $200,000, would you sign up for a ride?
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- Sign me up! It would be a dream vacation.
- Maybe, but I'd wait to see if the flights are really safe first.
- No way. Space tourism is a waste of money.
Click here to take the poll at the bottom of our Home Page.
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FPGA Prototyping By VHDL Examples
(Xilinx Spartan-3 Version)
By Pong P. Chu
ISBN: 978-0-470-18531-5
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There's no better way to learn than by doing, and that's the approach taken in FPGA Prototyping By VHDL Examples. If you're relatively new to FPGA prototyping, this book is a decent place to start.
Read the full article...
| Rev Up Your Interdisciplinary Design Skills
What happens when a microcontroller turns on a power FET, sending a current pulse to a motor coil that develops a magnetic field which turns the rotor shaft, advancing a timing belt that drives a pair of nip rolls suspended on bearings in a web-processing operation on a form, fill, and seal machine installed on a potato chip line at a Frito Lay plant in central California? And how can you be sure that the encoders, prox sensors, and other feedback devices you plan to use will accurately see and report every relevant motion, machine state, and process condition?
And will the signals get through the networks fast enough, without being corrupted, giving the controllers time to execute their algorithms as intended? It's a lot to think about, and it only scratches the surface of what many engineers grapple with today. If you happen to be one of them, then the place for you — where you can find answers and meet others with similar concerns — is www.Mechatronic-Design.com.
Backed by some of engineering's top information sources including Machine Design, Electronic Design, Motion System Design, and Power Electronics, Mechatronic-Design.com is the interdisciplinary engineer's desktop, toolbox, library, and lifeline in one easily accessible place.
Find. Learn. Apply.
Mechatronic-Design.com | |
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