Interconnecting peripherals and mass storage to embedded processors has always been a challenge, but now it’s an even more critical part of designing portable devices. Designers must solve numerous problems, such as power consumption, data speed, and configuration flexibility, while minimizing parts count and cost. One solution that bears consideration is the West Bridge, a fast interface solution that can simplify many embedded portable designs.
The rationale for a unique interface like the West Bridge is borne from the exploding portable electronics market over the past decade. Some “killer applications” like the MP3 player emerged and subsequently advanced rapidly to fulfill growing demands. Launched in the late 1990s, some may say that the MP3 player has led the consumer electronics technology evolution.
Stemming from the portable, battery-operated device that offers simple digital music playback, designers have since reinvented the “MP3 player” concept to offer more complex functionalities. Consequently, integrated products like personal media players (PMPs) and music-enabled mobile handsets were created.
The Apple iPod, for example, has transformed from a basic MP3 player into a family of sophisticated PMP and handset products. The latest iPod Touch supports not only picture/video playback, but also advanced features like built-in Wi-Fi for mobile Internet browsing. Other consumer electronics, such as personal navigation devices (PNDs), portable game consoles, electronic dictionaries, and digital photo frames are also adhering to similar integration trends. Nonetheless, several challenges still exist in today’s portable consumer electronics designs.
INTEGRATING THE LATEST TECHNOLOGIES
As technologies rapidly evolve, vendor success depends heavily on the ability to address fast-changing consumer demands. The key is to keep the brand name fresh by periodically introducing new products, while also offering a portfolio of products that can cater to the different customer bases. Not only is it important to roll out products quickly, it’s even more vital to do it efficiently. System designers must adopt components that are flexible and expandable, and leverage reusable design architectures to cut down cost and shorten design cycle.
Of course, another key to market success is minimizing bill of material (BOM) and manufacturing costs. As each product model is expected to drive a high volume during its lifetime, even the slightest cost difference can determine the profitability and success of a product. However, in the process of balancing performance, integration, and cost, it’s a common pitfall to become overly preoccupied in picking a processor that offers the most features while failing to realize the importance of their quality. Therefore, system designers must manage the trade-off between the number of integrated features and their performance on an embedded processor. Often, products with many features but suboptimal system performance fail miserably in the fiercely competitive market.
As consumer electronics become more integrated and feature-rich, embedded processor vendors are also jumping onto the integration bandwagon in attempt to differentiate their products. The newest processors include many of the “popular” features that cater to the targeted applications; however, a number of the latest mass storage and peripheral standards remain unsupported. That’s because the evolution of mass storage and peripheral technologies moves at much faster rates than processor core technology.
By the time a processor goes through its typical two-year design cycle, new mass storage and peripheral standards have already arrived. It’s impossible for a processor to keep up with the latest standards. One design alternative for system designers is an external bridge to supplement the embedded processor with support for the latest mass storages and peripherals.
WEST BRIDGE ARCHITECTURE
In attempt to keep processors, mass storage, and peripherals connected, developers are introducing the West Bridge to architectures(see “What Is A West Bridge?”). Just like the North and South Bridges in the PC world, the West Bridge is designed to interconnect the main processor in an embedded system to external peripherals. An architectural example of a West Bridge is illustrated in Figure 1.
The West Bridge has three interfaces: a processor “P” port, a high-speed USB “U” port, and a mass storage “S” port. The “P” port provides embedded processor connectivity, and supports hardware DMA access. A flexible and configurable “P” port can support various standard interfaces available on different processors. The “U” port provides a USB2.0 Hi- Speed USB link, and the “S” port can be configured to support a variety of mass storage devices, such as SD/SDHC, SDIO, MMC, CE-ATA, and SLC/MLC NAND devices. The red arrows in Figure 1 show the possible datapaths among the three ports that allow all three data paths to operate concurrently, enabling multitasking of mass-storage and peripheral functionalities.
SUPPORTING THE LATEST STANDARDS
As mentioned previously, embedded processors in the market today don’t provide adequate support, if at all, for the latest mass-storage and peripheral standards. The West Bridge enables new peripheral connectivity, such as USB2.0 Hi-Speed, and support for new mass storage devices like SLC/MLC NAND, SD 2.0 SDHC/SDIO, MMC 4.2, and CE-ATA.
The design cycle for West Bridge devices is also much shorter than a fullfledged processor. Therefore, just like the North and South Bridges in the PC world, it’s envisioned that West Bridge will complement processors in embedded systems to provide support for the latest technology standards.
Figure 2 shows a typical example of an USB2.0 Hi-Speed implementation, where the embedded processor integrates high-speed USB SIE and an external transceiver. The data from the PC first passes through the USB2.0 High- Speed pipe and gets buffered into the SDRAM. The processor then reads the data from SDRAM and writes it into the mass-storage device. Not only does the series of intermediate transfers prevent the system from fully exploiting the highspeed USB link, it can also drastically slow down the system if the software isn’t carefully optimized. Thus, using this architecture often doesn’t yield the best consumer experience.
The West Bridge architecture (Fig. 3), in which mass-storage devices are attached directly to West Bridge, is radically different than the architecture in Figure 2. The transfer of data is completely offloaded from the processor, since the processor is no longer in the data path. This frees up processing bandwidth for more important tasks.
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