The “F” in FPGA could easily stand for flexible, rather than field. In fact, the flexibility that today’s FPGAs provide is far more important than the ability to program a device while in the field, at least for most designers. And since Xilinx leads the industry where flexibility is concerned, it seems only natural that its latest offering, the Virtex-5 FXT, provides a nice platform to build your next system or device family around.
With flexibility in mind, the FXT is the first FPGA to come standard with one or two embedded PowerPC 440 processor blocks, DSP capabilities, high-speed serial transceivers, and integrated logic. Xilinx customers played a large role in determining its capabilities, demanding higher bandwidth, higher processing performance, better integration, and a more customizable platform and IP. According to the company, the increased performance won’t cost you any more of your power budget. In fact, the dynamic power consumption has been reduced by 35% relative to previous-generation devices.
The device has customers and market analysts excited. “The integration of major processing and SERDES (serializer/deserializer) components on a single device will be of significant value to designers who need to conserve board space and costs, while meeting stringent requirements for high performance,” said analyst Will Strauss, president and founder of Forward Concepts. “In wireless, for example, the kind of basestations a technology like the Virtex-5 FXT platform can enable is enviable, especially in the area of LTE (Long-Term Evolution) basebands in support of 4G communications systems.”
Taking a closer look at the PowerPC 440 blocks, we find dual 32-kbyte instruction and data caches, in addition to an integrated 5x2 crossbar processor interconnect architecture that provides simultaneous access to both memory and I/O. The architecture also includes master and slave local bus interfaces, four DMA ports with separate transmit and receive channels, and a dedicated memory bus interface (see the figure). Put it all together and you have a processor block capable of delivering up to 1100 DMIPS at 550 MHz.
With the ever-increasing need for increased transceiver bandwidth, the FXT delivers with Xilinx’s RocketIO blasting bits from around 500 Mbits/s to 6.5 Gbits/s. This range enables design-in of a range of standards, including XAUI, Fibre Channel, Sonet, Serial RapidIO, PCI Express (1.1 and 2.0), and Interlaken.
As for the DSP capabilities, the FXT serves up 384 DSP slices (combination of multipliers, multiplexers, and adder/subtractors). Along with over 16 Mbits of internal memory, these slices can deliver over 190 GMACs of DSP processing performance and 92 Tbits/s of memory bandwidth at 500 MHz.
Xilinx has two devices available for engineering sampling now, the FX30T and FX70T, with three others coming over the next few months. The company expects initial production devices to arrive in the third quarter. The FX30T will list for $159 in 1000-unit volumes by the second half of 2009.
XILINX • www.xilinx.com
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