Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?

[Web Exclusive]

FDKs Target Mixed-Mode and RF Technologies



Staff  |   ED Online ID #19009  |   May 20, 2008

Article Rating: Not Rated

UMC and Mentor Graphics have partnered on a new series of analog/mixed-signal and RF foundry design kits (FDKs). The FDKs, containing comprehensive and validated building blocks at the transistor device level, help IC designers to jump-start design cycles on UMC’s 0.13-um and 90-nm mixed-mode/RF process nodes. Featuring Mentor’s analog/mixed-signal IC flow, the FDKs are poised to reduce time-to-market and optimize manufacturing success for analog, mixed-mode and RF SoCs.

The comprehensive FDKs include UMC Eldo simulation models, Calibre DRC, LVS and extraction technology files, schematic symbols and programmable device generators for supporting schematic driven layout and simulation, along with a set of configuration files for customization.

UMC's mainstream 0.13-um process employs up to eight layers of copper interconnects to enable a gate density of 220 kgates/mm2. UMC and Mentor Graphics will continue to extend FDK offerings to 65 nm and beyond by leveraging Mentor’s IC flow, which contains a unified design platform with a centralized design cockpit that allows seamless navigation throughout the entire analog mixed-signal IC design flow, from schematic capture, simulation and floor planning, to physical layout and final verification.

Contact Mentor or UMC directly for further information.

Mentor Graphics www.mentor.com

UMC www.umc.com




Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


  • Cadence Comes At Power From Two Perspectives
  • Collaboration Results In First IEEE 1149.7 cJTAG Semiconductor IP Core
  • Engineering A Hall Of Famer
  • Yield Enhancement Software To Aid Solar Cell Fabs
  • Audio Engine Codec Library Expands With Dolby Pro Logic Additions
  • Accellera Rolls New Version of Analog, Mixed-Signal Standard
  • 45-nm Via-Programmable ASICs Add High-Speed I/O Transceivers To Feature Mix
  • Verification Evolves Into Lean, Mean Bug-Stomping Machines
    1) Build A Smart Battery Charger Using A Single-Transistor Circuit
    (202 views today)
    2) Power Architecture Group Defines High-Speed Serial Trace Spec
    (142 views today)
    3) Evident Technologies Debuting Nanocrystal LEDs
    (138 views today)
    4) TI Working To Develop IEEE 1149.7 2-Pin Debug Spec
    (136 views today)
    5) White LEDs Clear Another Brightness Bar
    (130 views today)
    ALL TOP 20







    POST YOUR COMMENTS HERE

    Name:

    Email:
    Rate this article:

     less useful more useful 
    1
    2
    3
    4
    5
    Your Comments:

    Enter the text from the image below




    Please refresh the page if you have trouble reading this text.
     
     

    PartFinder

    Find real-time pricing, stock status, same-day/next-day shipping options and more. Brought to you by Digi-Key. Go to PartFinder.    
    GlobalSpec

    PART SEARCH :
    Powered by: GlobalSpec - The Engineering Search Engine
    Sponsored Links

    Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF RF Design
    Schematics Find Power Products Military Electronics Featured Vendors EE Events Free Design Resources