ED_EDA Alert Update_: Software Rules The Day In Multicore SoC Design
EDA Alert e-Newsletter | May 6, 2008
Live date – Weds June 11th at 2:00pm ET Hosted by: Electronic Design Sponsored by: Micro Power & Panasonic
Aftermarket Battery Packs - Revelations from Product Tear-Downs
Aftermarket battery packs are available for most portable devices. This webcast presents the results of several product tear-downs on aftermarket battery packs, and explains how substandard aftermarket packs can cut corners on cost, safety mechanisms, and battery performance. These tear-downs expose electronic & mechanical design issues, as well as good manufacturing and regulatory violations. Then, this webcast provides solutions for OEMs to manage and control their ecosystem of aftermarket battery pack suppliers. This webcast is applicable to OEMs of consumer and industrial electronic products susceptible to aftermarket batteries, such as medical, handheld radio, and data collection devices.
Looking back over the past 10 years or so, semiconductor process technology more or less kept pace with the demand for functionality in large-scale processor-based ICs. When the next-generation set-top box IC needed more horsepower, a move from, say, a 180-nm process to 130 nm would provide the necessary boost by adding gates and the ability to run faster clocks. But that next-generation chip would still carry a single processor. Things have changed dramatically in the last few years. Simply put, silicon scaling no longer meets functionality requirements.
Our editors have been busy! Come read their commentaries and check out exclusive videos from the Embedded Systems Conference, Mobile World Congress, APEC, and Embedded World exhibitions and see the technology of tomorrow from major players in the electronics industry.
There was a ton of announcements made at the Embedded Systems Conference earlier this month. Check out the highlights, exclusive commentary, and footage from the show by Electronic Design's Editor-in-Chief Joe Desposito on our Web page, sponsored by Lantronix, Xilinx, and Altium. You can also find video interviews by Electronic Design Europe's Editor-in-Chief Paul Whytock here.
The International Electronics Forum (IEF) has established itself as an event for senior-level personnel who need to understand the way the semiconductor industry sees the future unfolding. Future Horizons, a global semiconductor analyst company, is hosting the 17th IEF under the auspices of the Dubai Silicon Oasis Authority at the Madinat Jumeirah, Dubai, May 7-9. The theme of this year’s conference is "Revolution or Evolution."
Intelligent DAQ is multifunction data acquisition that features user-defined, on-board processing for complete flexibility of system timing and triggering. Instead of a fixed ASIC for controlling device functionality, intelligent DAQ uses an FPGA-based system-timing controller to make all analog and digital I/O configurable for application-specific operation. You can configure the FPGA chip by creating LabVIEW block diagrams with the National Instruments LabVIEW FPGA Module. National Instrument's Vineet Aggarwal demonstrates this functionality with a new vocoder application and some excellent beatboxing skills.
Want an Amazon Kindle eBook Reader? Take The Engineering TV Quiz . . . Been tuning into Engineering TV lately? Engineering TV created a quiz to test your knowledge, and sponsor DigiKey Corporation has put an Amazon Kindle eBook Reader up for grabs for the contest. Answer the short quiz to throw your name into the hat for this hot item. Haven't been watching Engineering TV? That's alright. You can still enter to win the prize. But the contest will close on May 9, so don't delay.
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Tool Ferrets Out Analog/RF Circuit Noise
Device noise is insidious to gigahertz, nanometer-scale analog, and RF CMOS circuit performance. In the past, it’s been either impractical or outright impossible to perform transistor-level analysis of the impact of device noise for many complex analog and RF circuits, including sigma-delta ADCs, video DACs, fractional-N PLLs, frequency synthesizers, and wideband VCOs.
Targeting SoC/ASIC developers of projects from 3 Mgates to 180 Mgates, the latest generation of GiDEL’s PROC_SoC Verification System doubles the capacity offered by previous versions by incorporating Altera’s Stratix III EP3SL40 FPGAs.
The latest release of Intusoft’s ICAP/4 Spice-simulation suite includes enhancements in waveform-creation capabilities as well as in automated component conversions. Build 3247 of ICAP/4 8.x.11 is also reported as having had the fewest bugs in Intusoft’s history during the company’s testing cycle on the revision.
Version 11.1 of Ansoft’s HFSS software for 3D full-wave electromagnetic field simulation is now available, offering a number of new enhancements. The tool now offers meshing as well as model resolution and validation features. It supports Nastran (.nas) geometry import as well as Parasolid and Unigraphic geometry import (the latter under Windows only). It also offers enhanced post-processing features.
45th Design Automation Conference - Mark Your Calendar! DAC – June 8-13 – Anaheim, CA. The world’s largest electronic design automation event! 225+ EDA, IP, Silicon and Design Services exhibitors, 230+ technical papers, panels, tutorials and the special Wireless Device Design sessions. Check out 22 new workshops and collocated events.
45th Design Automation Conference - Mark Your Calendar! DAC – June 8-13 – Anaheim, CA. The world’s largest electronic design automation event! 225+ EDA, IP, Silicon and Design Services exhibitors, 230+ technical papers, panels, tutorials and the special Wireless Device Design sessions. Check out 22 new workshops and collocated events.
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