[Design View / Design Solution]
Interface High-Performance Op Amps With ADCs
Give your system a boost by interfacing high-end op amps with ADCs, using one of three different driver architectures.
The source that drives high-resolution analog-to-digital converters (ADCs) sees a high-frequency ac load and a dc load of a few hundred ohms or more. Thus, a high-performance op amp with high input impedance of a few megohms and low output impedance would be an ideal choice as an input ADC driver. The ADC driver acts as a buffer and a low-pass filter to reduce overall system noise.
As signals travel through the traces of a printed-circuit board (PCB) and long cables, system noise accumulates in the signals and a differential ADC rejects any signal noise that appears as a common-mode voltage. Using differential signals rather than single-ended signals has a couple of advantages: Differential signals double the dynamic range of the ADC, and they offer better harmonic distortion performance.
There are several ways to produce differential signals from a dual-op-amp configuration. Two popular methods are single-ended-to-differential conversion and differential- to-differential conversion. The former method requires a single input source, while the latter requires a differential input source. To utilize the full dynamic range of the ADC, the input must be driven to full-scale input voltage.
This article discusses three different ADC driver architectures: single-to-single, single-ended-to-differential and differential-to-differential. It provides, in a concise manner, all of the necessary information for interfacing high-performance op amps with ADCs.
SIGNAL PATH ESSENTIAL COMPONENTS Several key elements must coalesce for effective analog front-end design in the signal path (Fig. 1). The typical signal path’s analog front-end includes an op amp that drives the ADC, an RC filter, and the microcontroller or digital signal processor (DSP).
A real-world input source can have non-ideal impedance. Thus, a buffer amplifier, with very low output impedance, is required to drive the input of the ADC. The external RL-CL filter works as an anti-aliasing filter that helps lower the noise bandwidth of the ADC driver and buffer the charging transients caused by the ADC sample-and-hold circuit. To minimize the droop in the input voltage, external shunt capacitance (CL) should be about 10 times larger than the internal input capacitance of the ADC. In addition, external series resistance (RL) should be large enough to maintain the phase delay at the output of the op amp and hence maintain the stability.
Most applications benefit from the inclusion of a series isolation resistor connected between the op-amp output and ADC input. This series resistor helps limit the output current of the op amp. The value chosen for this series resistor is very important, since a higher value will increase the load impedance seen by the op amp and improve the op amp’s total-harmonic-distortion (THD) performance. However, the ADC prefers to be driven by a low impedance source. Thus, the optimum value for this series resistor must be found so that it will offer the best performance in terms of THD, signal-to-noise ratio (SNR), and spurious free dynamic range (SFDR) of the combined op amp and ADC.
When interfacing an ADC with an op amp, it’s imperative to understand the specifications that are important to get the expected performance results. Modern ADC ac specifications such as THD, SNR, settling time, and SFDR are critical for filtering, test and measurement, video, and reconstruction applications. The high-performance op amp’s settling time, THD, and noise performance must be better than that of the ADC it’s driving to maintain the proper system accuracy with minimal or no error.
For this article, either the LMH6611 or the LMH6618 single op amp is used to drive the single-channel ADC121S101 ADC, and either the LMH6612 or the LMH6619 dual op amp drives the differential input ADC121S625 or ADC121S705 ADC. These amplifiers are designed for ease of use in a wide range of applications requiring high speed, low supply current, low noise, and the ability to drive complex ADC and video loads.
KEY OP AMP AND ADC SPECS Some system applications require low THD, low SFDR, and wide dynamic range. Others require high SNR, potentially sacrificing THD and SFDR to focus on noise performance.
Noise is a very important specification for both the op amp and the ADC. Three main sources of noise contribute to the overall performance of the ADC—quantization noise, noise generated by the ADC itself (particularly at higher frequencies), and the noise generated by the application circuit. The impedance of the input source affects the noise performance of the op amp. Theoretically, an ADC’s SNR can be found from the equation:
SNR (in dB) = 6.02N + 1.72
where N is the resolution of the ADC. For example, according to this equation, a 12-bit ADC has an SNR of 74 dB. However, the practical SNR number would be about 72 dB. To achieve better SNR, the ADC driver noise should be as small as possible. The LMH6611/LMH6612/LMH6618/LMH6619 have low voltage noise of only 10 nV/vHz.
Please refresh the page if you have trouble reading this text.
Search Electronic Design
Email Newsletter
Sponsored By:
Electronic Design UPDATE provides readers with late-breaking news, opinions from industry experts, and timely technology stories. It's a unique opportunity to get your product message in front of engineers, engineering managers, and corporate managers while they're reading about critical information online.
Reprints
