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[Design FAQs]
FPGA Improves Basestation Design
Sponsored by Xilinx


Louis E. Frenzel  |   ED Online ID #20123  |   November 25, 2008


Download the full article as a .PDF, sponsored by Xilinx, Inc.

What are some of the challenges facing basestation designers today?
The five biggest are the numerous wireless standards that must be accommodated, increased and complex frequency assignments, increased operating efficiency, capital expenditures (CAPEX), and scalability.

Why must designers deal with so many standards?
Most new basestations benefit from being able to handle multiple air interfaces. New basestations that implement Long Term Evolution (LTE) or WiMAX that can also support past air interfaces like WCDMA, cdma2000, and GSM will be in strong demand. A typical basestation will still have to support single-channel and multiple-channel GSM as well as, say, LTE.

What are the frequency issues?
Basestations will still use their assignments in the 800- to 950-MHz, 1800- to 1950-MHz, and 2110- to 2170-MHz range but will extend to new frequencies like 1.7, 2.3, 2.6, and 3.5 GHz and even 700 MHz. A basestation must be flexible enough to change as new subscribers and services are added.

Why is operating efficiency so vital?
Power amplifiers (PAs) in a basestation typically constitute up to 70% of the overall site power consumption. This is due to the poor efficiency inherent with supporting higher modulated signals. Deployment of efficiency improvement algorithms in the digital domain significantly improves the efficiency of the PAs.

Lowering power consumption greatly reduces the operating expenses (OPEX) of a network operator. Furthermore, with the green movement demanding less power usage and a lower carbon footprint, carriers not only can help the environment but also cut many millions of dollars from their bottom line.

What is the issue with CAPEX?
CAPEX increases as new standards and systems are implemented. Carriers are constantly under the gun to reduce CAPEX. However, new FPGA-based equipment featuring a new multimode design using digital pre-distortion and other technologies is smaller, lower in cost, and more power efficient.

What does scalability mean?
It means designs should be able to be used in a variety of configurations, not only the macrocell. Today, microcell, picocell, and femtocell basestations are more common than ever, and great savings accrue if a single design can be used for all or most configurations.

What are some of the major objectives in a new basestation design?
Besides the usual lower development costs and faster time-to-market, new designs must be more flexible so new air interface standards may be quickly changed or updated. The design also must be more reliable. A big objective is to reduce both the initial CAPEX and OPEX associated with the equipment.

What part of the basestation design will yield the greatest benefits?
The transmitter is the primary target, as many functions now implemented with ASICs and other individual ICs can be combined in an FPGA, with lower costs and higher reliability. Of course, any circuitry associated with the PAs will yield major gains in efficiency and lower power consumption and heat.

What does the transmitter architecture look like?
The figure shows a typical UMTS WCDMA transmit chain. Note the individual segments with their approximate costs and power consumption levels. This design uses receive diversity and digital pre-distortion in the PA.

Yet these sections can be implemented in a single FPGA. Six chips become one, cost is cut to less than a third, and the power consumption is almost halved, all improving reliability. And, the FPGA’s programmability provides the flexibility to handle multiple frequencies for different air interfaces.

How does digital pre-distortion (DPD) improve performance?
It improves the efficiency of the PAs. All modern cell-phone standards use air interfaces that need a linear PA.

WCDMA and LTE are both broadband techniques to achieve greater capacity and increased spectral efficiency. Higher-level modulation techniques like QAM demand the linearity.

Most PAs are LDMOS class AB designs that rarely achieve an efficiency greater than 10%, so 90% of the total power used ends up as excessive heat. The reason for the inefficiency is inherent in the class AB design, but it’s also the result of having to reduce the amplifier output to deal with signals that exhibit high peak to average (PAR) power and to prevent distortion, which results in adjacent channel power leakage.

Continued on page 2


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