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[Technology Report]
Take The FPGA Plunge
While FPGA features continue to improve, advances in design tools help to expand the audience.

William Wong  |   ED Online ID #20519  |   January 29, 2009


FPGAs are expensive... and hard to use... and too slow... and difficult to program... and hard to debug... and they draw too much power... and require register-transfer-level (RTL) wizards. That’s the conventional developer widsom, at least. But before you run for the exits, sit and relax, because the conventional wisdom is wrong.

Yes, FPGA design will likely take you out of your comfort zone if you’ve never handled an FPGA or ASIC design. But even novices can manipulate FPGAs without resorting to a graduate degree. This isn’t to imply that becoming an FPGA guru overnight is possible, though. Still, the learning curve has moved from a black diamond to more of a rolling hill.

The primary drivers behind this change are the improvements seen in all types of FPGA development tools. There has been a greater emphasis on support for soft-core processors, since a significant percentage of new designs employs at least one softcore processor.

In many of these cases, the designers are programmers or systems engineers. Consequently, FPGA software vendors enhance their products so that they’re better able to support a growing class of developers.

Soft-core processors are an expanding part of the target hardware for reference designs and development kits. Altera’s NIOS II Embedded Evaluation Kit, Cyclone III Edition, is one of many kits designed to facilitate software application development on FGPA platforms (see “Development Kits Help Alleviate Those FPGA Design Woes” at www.electronicdesign.com, ED Online 19509). The NIOS II is a 32-bit RISC-style core (Fig. 1). Kits like this come with predefined FPGA configurations. Therefore, developers can concentrate on application software with minimal FPGA manipulation (though that’s typically the starting point).

Incrementally improving a soft-core processor system design with additional peripherals is a relatively easy process. For example, Xilinx’s ISE Design Suite can be used to construct systems based around its MicroBlaze soft-core processor.

Altera’s SOPC Builder provides similar functionality. The design tools incorporate the MegaWizard interface to configure and add more intellectual-property (IP) blocks into the system (Fig. 2). The interface allows selected blocks to be modified using custom dialog boxes without delving into the IP’s design. It’s also possible to hide the design, essentially presenting a configurable black box to the developer.

Adding IP to a modular framework with a soft-core processor is also easier than working with most FPGA designs. That’s because a framework is provided with the soft-core processor to handle common design attributes, such as address and data bus connections as well as interrupts.

Creating a design based on a soft-core processor is often a matter of selecting the desired modules and then configuring them using the MegaWizard. The development tools handle linking and layout. Just specify the pins that will be used to connect with the peripherals.

Actel, Altera, Lattice Semiconductor, Xilinx, and other FPGA vendors are all including more peripheral IP that works with their collection of soft-core processors. This makes it significantly easier to replace a microcontroller with an FPGA. The range of FPGA costs and performance has been steadily increasing, with low-end FPGA prices at less than 50 cents and clock rates hitting 1.5 GHz (see “FPGA Technology Advances” ).

Why take this approach? Among the many reasons, you could, for example, tie the IP to a system. This allows it to be moved to new FPGAs, eliminating or at least reducing the effects of obsolescence. That’s why standard processor core architectures such as the 8051 and its associated peripherals are available.

The challenge is replicating vendor-specific peripherals, and that happens to be where FPGAs shine. Still, the level of expertise that’s required to build a peripheral from scratch or even modify an existing design is much higher than that required to create a custom microcontroller by selecting features from a Chinese menu.

On the plus side, it’s a one-time-only process. Also, the same process is used to create custom IP. The main difference from a few years ago is that it’s a markedly easier process.

SPREADING THE WEALTH
FPGA vendors have soft-core processors optimized for their chip architectures. As noted, a number of popular architectures like the 8051 are available across FPGA architectures. In addition, more new softcore processors are designed for FPGAs that match popular architectures.

These processors include ARM’s Cortex M1 and Freescale’s Coldfire. The cores come with a complement of peripherals that can be added to a design, permitting the creation of systems that resemble existing microcontroller designs. As with most FPGA IP, an FPGA vendor’s development tools can utilize these cores. Of course, migrating a design from one vendor’s toolset to another is quite a challenge.

Designers who need this level of portability might do well to examine alternatives. Some of these options are available from Altium, Mentor Graphics, and National Instruments. In most cases, these tools provide additional advantages. For instance, Altium Designer handles system design and printed-circuit-board (PCB) layout within the same environment.

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