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[From Systems to Silicon]

What’s In A System?



Frank Schirrmeister  |   ED Online ID #20552  |   January 21, 2009

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Recently there has been quite some discussion at conferences and in the blogosphere about system-level design, specifically around the term electronic system level (ESL). The buzz mostly centers around which technologies should be considered part of ESL.

Some system-level advocates suggest limiting ESL to the next step above hardware. Others suggest it encompasses a variety of techniques, which only have in common the fact that they are applied prior to the register transfer level (RTL), which has been for at least the last 10 years and still is the pre-dominant entry point from which chip implementations are derived.

Driven by my German genes, my impulse is to help to put pre-RTL technologies into buckets with nice labels on them like ESL. Yet I will resist doing that and focus on what I think matters to developers, who really don’t care about the names given to technologies they are using.

On The Job

The developers I talk to during my day job care about being as productive as possible. They have ideas and need to get them to implementation as quickly as possible to meet specific market windows. Depending on which application domains their ideas target, different requirements will drive their implementation decisions. Some care more about power, others about performance, and everybody seems to care about cost.

Complexity is the key issue making developers’ lives complicated. The number of issues they have to wrap their heads around has grown tremendously. In less than 25 years, chip complexities have grown about 12,846-fold from 134,000 transistors in 1982 for an Intel x286 to 1.72 billion transistors in 2005 for a dual-core Itanium. And, the complexity of software running on embedded processors in those chips has exploded as well.

Given the growth in complexity, developers depend on technologies to improve their productivity. Enabled by tools, the design entry level moved up from transistor layout to logic gates to RTL. A chip with a billion transistors can be expressed in about 100M logic gates and about 10M lines of RTL. In every step up, a new design entry technology was introduced. These entries were about 10 times less complex than their predecessors. Also, the next level down could be automatically derived from the new arrivals (see the figure).

Abstraction allows representation of the design intent at a new design entry level with about 10 times less complexity. Synthesis permits the automatic implementation driven by the higher level of abstraction. Once automation of implementation exists, verification can be performed at the higher level of abstraction, and formal verification can prove the equivalence of both representations.

So where does that leave us with system-level design? The discussion about ESL is missing a clear definition of the “S” in ESL, i.e., what a system really is. It is all a question of perspective. One developer’s system becomes a component for the next developer. Let’s use the design entry at RTL as starting point.




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