The higher data rates and advanced services expected of next-generation 802.11n (Wi-Fi) and WiMAX-based wireless enterprise access points (APs) will require engineers to carefully balance the need for higher performance with cost and power consumption. This presents a difficult challenge for the approach they take in system design.
In access points designed to utilize the emerging generation of 802.11n radios, which currently achieve up to 300 Mbits/s and will soon reach up to 600 Mbits/s, a separate host microprocessor is essential to handle the much higher packet rates and new protocol requirements. AP designs that relied on just the embedded processor within the wireless chipset would quickly become overwhelmed.
To meet the complex challenges presented by 802.11n technology, designers need an innovative microprocessor that can deliver great performance and integrated features like PCI Express (PCIe), Gigabit Ethernet, USB 2.0, and an advanced security engine. It’s also essential that it consume the least amount of power possible and deliver all of these capabilities at an affordable price.
The IEEE 802.11 Working Group is closing in on a final specification for the new 802.11n Wireless LAN standard, with ratification expected by the first half of 2009. This revolutionary new WLAN standard will increase maximum Wi-Fi data rates by up to 10 times, taking them from a maximum of 54 Mbits/s for 802.11g and 802.11a to 600 Mbits/s with 802.11n. In addition to faster data rates, next-generation access points will be expected to support several new protocols for quality of service (QoS), Voice over Internet Protocol (VoIP), and advanced security for VPN and IPSec.
The 802.11n standard is a key enabling technology for a wide range of enhanced WLAN applications, including high-definition (HD) video streaming, multichannel high-fidelity audio streaming, comprehensive network security, and multiple, simultaneous VoIP channels. An HD video stream typically needs 20 Mbits/s of dedicated bandwidth on a network. In first-gen 802.11n radios, it’s common to see up to 200 Mbits/s of available bandwidth.
However, when you account for network overhead required to manage wireless links, the available bandwidth drops to less than half that rate under typical operating conditions, making it impractical for even a single compressed HD video channel. For this reason, video streaming over 802.11g networks has never achieved commercial success. With 802.11n’s support for highperformance radios, there’s more than sufficient bandwidth available to simultaneously carry multiple HD video and VoIP channels across distances of up to 40 meters.
To support these higher data rates and new services, next-generation wireless access-point designs require a new breed of microprocessor. The ideal processor requires high levels of integration to reduce system complexity, lowering the external component count and overall system cost. A cost-effective microprocessor suited for 802.11n AP designs must be optimized for the demanding enterpriseclass workloads, as well as for both general networking and general-purpose processing applications, allowing economies of scale to keep its price low.
To offer major enhancements in performance, bandwidth, security, and multi-platform support for next-generation APs based on the new 802.11n and WiMAX standards, designers should consider microprocessors with the following attributes:
• Processing performance up to 600 MHz, yielding 900 DMIPS
• Dual single-lane PCI Express ports, each with integrated SERDES to support connectivity to 802.11n/Wi-Fi, WiMAX, or other PCI Express-based chip sets
• Very low power dissipation, to ensure compatibility with 802.3af (PoE)
• Integrated hardware-accelerated Turbo Security Engine for handling IPSec and VPN services, featuring single-pass operation and full header/trailer protocol processing independent of the CPU
• USB 2.0 On-The-Go with support for either host or device modes
• DDR1/2 memory support
But designers of these systems have to meet strict cost constraints. With that in mind, a microprocessor offering all of the attributes listed above should be available for an average selling price of under $20 to achieve design momentum.
SCALABLE PERFORMANCE
Today’s consumer-grade 802.11a/g APs typically don’t have separate application processors. Often, there’s enough processing capacity available in the embedded processor core within the wireless chipset to handle AP tasks and a minimal number of higher-level protocols.
The shift to 802.11n radios in access points, though, will require the addition of a host processor to accommodate the increased data rates. Moreover, new enterprise and residential network services require increased security, support for multimedia streaming and real-time VoIP, and support for the advanced protocols and standards behind these services such as H.232, IPSec, and AES.
To meet these needs, host processors in next-generation AP platforms should deliver up to 900 DMIPS of processing capacity. Thus, designers of AP systems must consider the system-level throughput requirements. These would include PCI Express, since most new 802.11n radio cards are shifting to this interface, 32-bit DDR2 memory for high performance, and Gigabit Ethernet to accommodate 802.11n data rates that are well above 100 Mbits/s. Figure 1 shows an optimized processor architecture for 802.11n APs.
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