A quiet revolution is occurring in passive component integration. The advanced electronic systems being designed and built today require greater component density for increased functionality. They also demand lower equivalent series inductance for increased speed as well as overall tighter control of parasitic resistances, capacitances, and inductances that produce electromagnetic interference. Moreover, they need higher assembly yields for lower system costs.
Although discrete component size reduction will continue, this can only address the first driver of integration—component density. Even on this count, size reduction provides diminishing returns now that the leading edge has reached the 0201 case size. At this point, the circuit board area required for the solder pads and the "keep-out zone" around the part become equivalent to the size of the part. The other drivers, lower ESL and parasitics, become more difficult with part size reduction.
Several technical solutions are being developed for passive integration. Some integration is actually occurring on the ASIC die in the redistribution layer for flip-chip devices where low-value inductors have been incorporated. Low-temperature cofired-ceramic (LTCC) solutions are available for some RF functions. But this technology is limited by the material incompatibility of high-dielectric ceramics with high-Q ceramics, ceramic resistors, and low-loss inductors. Much development is ongoing in this area. For example, an RC integrated passive device technology was recently applied to develop an LTCC matrix with up to 30 layers of buried resistors.
Another tactic is to bury resistors, capacitors, and inductors in advanced printing wiring boards (PWBs) and remove the SMD devices completely. Some commercial resistor materials available have found niche uses, and a few trial modules incorporating a limited number of buried Rs, Cs, and Ls have made their way into some commodity handheld devices. But once again, material issues are a severe limitation. High-K dielectrics compatible with PWB technology are only in the research stage. The full range of resistor values isn't available, and the manufacturing tolerance for buried resistors isn't good enough, requiring costly trimming. Finally, there are no CAD tools for incorporating passives in the PWB layout. Although these issues are being researched, the commercialization of buried passives technology is still far off.
Another option, thin-film technology, has a long history. Discrete, ultratight-tolerance capacitors, inductors, and fuses based on thin film have been in production for more than 10 years. Recently, a couple of thin-film fabs for passive integration began operating. One technical barrier, a compatible high-K dielectric material, fell when a K1000, submicron, thin-film X7R dielectric was commercialized. Thin-film technology excels where precision, tight-tolerance, low-inductance, controlled parasitic parameters and component density are required. It can be used in a broad range of applications from high-speed digital processing to wireless or automotive. For dies smaller than 20 mm2, thin film can be the cost-effective solution.
Clearly, there's a trend to integrate passive components into more complex functional units. However, no single technology offers a universal solution to passive integration. So we should expect to see different technologies being applied to integrate different types of functions. Over the next several years, the growth in the number of discrete passives per system will be checked by the adoption of integrated passive devices. Then the topography of the circuit board will change, and the boundary of circuit design that separates the passive component manufacturer and the board designer will be blurred.
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