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[Technology Report]
Flash Memory Takes Over
Flash memory has deeply penetrated consumer goods with its rising densities and falling price/bit. But new technologies will try to replace it.

Ray Weiss  |   ED Online ID #3756  |   August 20, 2001


Flash memory is on a roll. It has gone from a backup, secondary technology to a mainstream product technology that's critical to a wide range of consumer and embedded applications. Flash memory, warts and all, is a key component in most design toolboxes, and it will remain so for at least five years.

The good news is that flash memory will be able to track the silicon curve, at least for the foreseeable future. It will scale, continuing to drop in price per bit, while reaching higher densities for storage applications. Flash is now made on CMOS processes employing features as small as 0.15 to 0.18 µm. Over the next few years, features will scale down to well below 0.1 µm. That will let flash memory manufacturers fabricate chips with capacities exceeding 1 Gbit. Moreover, technologies like the multilevel cell (MLC) structures now pack 2 data bits/flash-memory cell. Further developments promise to bump that up to 3 bits or beyond.

But in the long run, flash may have problems. For one thing, it requires a high 9- to 20-V internal voltage for erasure and programming, and that needs to scale down over time (there is re-search aimed at a 5-V version). In addition, new technologies are emerging that may, with today's silicon and materials technology, provide a better nonvolatile storage medium, as well as eliminate many of flash memory's irregularities, such as nonsymmetric Read/Write and the high-voltage erase/programming. These emerging technologies include:

  • FRAM—ferro-electric RAM
  • MRAM—mag-netorestive RAM
  • OUM—Ovonyx unified memory
  • PFRAM—poly-meric ferroelectric RAM

Flash memory is an evolutionary technology, a des-cendant of EPROM and EEPROM. Both are nonvolatile memories, differing in that EPROM is erased by UV light and then electrically programmed, while EEPROM is erased and programmed electrically at the byte level. Like EEPROM, flash is electrically erased and programmed. But it also streamlines the chip design and thus brings down the cost of the overall chip by structuring the memory array to be erased and programmed in a large block rather than byte by byte. By eliminating the control lines to each cell, the storage array can be made smaller. So, the overall chip area of a flash memory is smaller than that of a byte-alterable EEPROM. Engineers, then, get the advantage of cost-effective nonvolatile storage, but they pay for it by having nonsymmetric Read/Write, with a complex, time-consuming Write procedure.

Flash comes in two architectural flavors, usually referred to as NAND and NOR. Basically, NAND-based cells can be viewed as a vertical string of transistors that form a logical NAND gate and share the sense amplifier and control circuitry. NAND-based cells are typically employed in word-serial storage architectures, while NOR structures are employed in memories that have standard random-access interfaces. In contrast, NOR can be viewed as a horizontal string of transistors connected to ground, which forms a basic NOR gate, each with its own sense amplifier and control circuits. Consequently, the basic NOR cell tends to be faster, but it uses more space, while NAND tends to be slower but much smaller (shared sense amplifiers are slower but make for a smaller circuit).

Today, NOR flash dominates, taking up approximately 75% of the market. It's in cell phones, PDAs, set-top boxes, cable modems, and telecom applications. But that NAND/NOR mix is changing, especially for storing digital, video, and audio data. NAND flash typically targets these storage applications, which generally don't need Read speed, but require density. Such applications include mass storage, video and audio storage, and portable storage.

To serve them, NAND flash chips can be had with storage capabilities of 128, 256, and 512 Mbits, while 1-Gbit versions are expected by year's end and 2-Gbit devices are expected next year. A big driver has been digital cameras, compact/special flash-memory cards, and MP3 players. While NAND tends to have a slow first Read (1 µs), it compensates with faster burst or page-mode Reads (60 to 80 ns) following the first access.


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