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[Design Application]

Software-Style Methods For Parallel Development Work For Hardware Designs


Complex designs need tools for managing design teams, intellectual property issues, and multiple design variations.

Contributing Author  |   ED Online ID #4021  |   April 30, 2001

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Parallel development is an essential technique for boosting the productivity of big software development teams that must make numerous changes to a large source-code base. To employ that technique, software engineers use sophisticated tools and procedures to manage parallel development tracks. These tools help developers manage multiple versions of their code, facilitate ports to different platforms, and manage the stream of bug fixes.

Now hardware designers face similar problems, in addition to some new troubles unique to system-level hardware development. The solutions to these problems will derive from the lessons learned by their software brethren. In the course of creating a complex hardware design, a team may create hundreds of thousands of files, but send only a small portion of them to the fab for tape-out. Without an effective revision control system geared for parallel hardware development, grave mishaps occur with an unfortunate regularity in the industry. (Consider, for instance, the loss of an entire mask set worth a half-million dollars, and three months of additional development time simply because someone grabbed the wrong file.)

By taking advantage of parallel development techniques, hardware designers can effectively address complex development-supply-chain (DSC) management issues. These DSC issues include employing and managing virtual design-team members spread across numerous geographic locations; creating multiple variants of the same design; using externally sourced semiconductor intellectual property (SIP); porting designs to multiple foundry processes and libraries; and the need to start on the next design before the current one is finished.

Most hardware developers force-fit generic software-oriented shareware tools, such as Revision Control System (RCS) or Concurrent Versions System (CVS), into their hardware development environment.

RCS manages multiple revisions of text or binary files. It automates storing, retrieving, logging, identifying, and merging revisions. Useful for files requiring frequent revisions, such as programs, documentation, graphics, papers, and form letters, RCS is widely used on Unix operating systems.

CVS is an open-source network-transparent version control system. It's useful for both individual software developers and large, distributed software teams. Based on a collection of shell scripts written by Dick Grune in 1986, the present version was designed and coded in 1989 by Brian Berliner and Jeff Polk.

These tools don't address the numerous problems specific to hardware design environments, though, or provide any type of multisite access solution. Moreover, managing and maintaining a custom version of shareware requires spending extensive time and resources—an effort that doesn't reside in the company's core business.

EDA tool vendors' attempts to supply parallel development capabilities for their tools have also fallen short. These programs work only with the particular vendor's tools and data. This poses a significant problem, because the typical design flow may incorporate 50 or more tools from a dozen vendors. Cadence's Team Design Manager (TDM) is one such case. Although reasonably effective for the company's files, TDM is less successful in a multivendor tool flow. (Ultimately, Cadence contracted with Synchronicity to develop a solution for tools that support parallel development.)

In lieu of ad hoc internal solutions, a suite of tools from Synchronicity lets hardware developers manage the parallel development of hardware, firmware, and software across geographic and corporate boundaries. The suite comprises three complementary elements: DesignSync, ProjectSync, and IPGear.

DesignSync provides revision control, workspace management, and process management through a client-server architecture built upon Internet standards and protocols. The branching and merging capability lets design teams create development branches for new, old, purchased, or unproven intellectual property (IP). Then when it's ready, the hardware description language (HDL) is easily remerged back into the mainstream product or derivative product, as necessary.

ProjectSync supplies the features needed for managing all tracking and communications of a system-level hardware design project. These features include configurable panels, triggers, access controls, and a built-in e-mail notification engine. ProjectSync is tightly linked with DesignSync's revision control features too.

One feature, IPGear, offers a comprehensive enterprise-design-reuse infrastructure and supply-chain management facility. A virtual corporate IP repository, IPGear delivers the benefits of design reuse across the enterprise, including business-to-business collaboration in the electronic-development supply chain.




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