The subject of digital-to-analog converter (DAC) applications is generally rather tame. It's usually confined to a boring discussion of settling time, the number of bits of resolution needed, the virtues of serial or parallel interfaces, and whether current or voltage output is best. Occasionally the conversation may become slightly enlivened by a requirement for such nonstandard features as optical isolation or a pulse-width-modulated (PWM) digital input. But mostly that's about as exciting as the topic ever gets.
Sometimes, however, an application comes along with a satisfyingly weird wrinkle. This DAC circuit affords a fine example because it produces neither an analog voltage nor an analog current output (see the figure). Instead, it outputs an optically isolated pure ohmic resistance in response to a PWM control input with 16-bit resolution (RO = RREF/PWM). Here, PWM is the 0 to 1.0 duty cycle of the control signal produced by the HC12 microcontroller. It can be used to digitally simulate a 1000-Ω (at 0°C) platinum-resistance temperature detector (PRTD).
The circuit can therefore be used in automated digital calibration of precision PRTD signal conditioning. This feature makes it possible to thoroughly optimize PRTD linearization (see "Precision Thermometer Linearizes, Digitally Calibrates Platinum RTDs," Electronic Design, May 29, 2000, p. 112) and algorithms (see "Efficient Algorithms Improve The Linearization Of Platinum RTDs," electronic design, Oct. 2, 2000, p. 138) over the full range of the DIN 43 760 standard of −200°C to 850°C. Either polarity of dc excitation is accommodated, and all necessary operating power (less than 10 µA at 10 V) for the isolated part of the DAC circuitry is derived from photovoltaic optoisolator U1. Optical isolation of the PWM signal is performed by the dual-channel optoisolator U4.
In operation, comparator A1 controls the state of switches SB and SC, causing the polarity of A2's feedback loop to match the polarity of the external "PRTD" excitation. This action correctly arranges A2's input configuration. This assures that the feedback from A2 to the gate bias of FETs Q1 and Q2 forces the voltage across RREF = VREF = IEXT × RREF to equal V1 (the average voltage output by SA). Since V1 = PWM × VEXT, A2's feedback loop forces IEXT × RREF = PWM × VEXT. So VEXT/IEXT = RREF/PWM. Yet by definition, VEXT/IEXT = the DAC output resistance (RO). Consequently, RO = RREF/PWM.
The A2 low-pass RC time constants as shown (3.3 MΩ and 0.1 µF = 0.33 sec = 0.5 Hz) produce an acceptable ripple level with a 122-Hz PWM signal. This signal is generated by an on-chip counter/timer of a 16-MHz HC12 microcontroller (U2). Varying PWM source frequencies or ripple attenuation requirements may dictate different RC values. Likewise, simulation of diverse PRT nominal resistances (e.g., 100 Ω at 0°C) may require a different RREF.
Subject to these provisos, this isolated PRT DAC circuit is quite versatile. Both excitation currents of up to 10 mA and excitation voltages of several volts can be accommodated. Accuracy and resolution are limited almost entirely by RREF's tolerance. Therefore, they can be made to rival those of even the best "real" PRTDs.
It is very good suit for my application. could please clarify some doubt about this design. Pleasec ontact me through above mail id.
Thanks & Regards Poorani
poorani -September 10, 2008
Your Comments:
Enter the text from the image below
Please refresh the page if you have trouble reading this text.
Search Electronic Design
Email Newsletter
Sponsored By:
Electronic Design UPDATE provides readers with late-breaking news, opinions from industry experts, and timely technology stories. It's a unique opportunity to get your product message in front of engineers, engineering managers, and corporate managers while they're reading about critical information online.
Reprints
