Half-duplex RS-485 networks offer minimal distributed wiring in industrial applications. This results from the remote stations sharing a single pair of copper wires as the communications medium. Software protocols ensure that there’s no network contention when one unit needs to transmit to an addressed RS-485 device.
When developing or troubleshooting RS-485 networks, the ability to connect a PC to either monitor the data flow or emulate the action of a network master or slave unit is invaluable. This circuit allows any PC to be connected to an RS-485 link without a dedicated ISA plugin card or an external power supply (see the figure). It takes its power from the RS-232 COM port of the PC. Apart from some software to govern the state of the RTS and DTR lines of the communications port, it operates transparently to the PC.
The RTS line controls the data flow. RTS is asserted (logic “0” is a 12-V signal) to set the interface as a network listener. This is the RTS default status, which ensures that the PC will not interfere with normal network traffic. RTS is cleared when the PC is ready to seize control of the A/B wire pair. Therefore, by using Q1 to drive the TE pin of the MAX487 transceiver chip high, the interface can act as a transmitter.
Power is derived from the DTR line, which is set to an active low (a 12-V signal) to switch the interface on. For the PC’s RS-232 port to deliver sufficient power, it’s crucial that the interface current consumption is kept below 2 mA. Therefore, a switch-mode regulator is required to provide the circuit’s 5-V power supply. Maintaining an IQ of less than 20 &3181;A, the MAX639 is an excellent choice for the dc-dc conversion.
U1’s surrounding components were selected for minimal current drain from the DTR line rather than for optimal efficiency. Transistor Q2 levelshifts the transmit (TX) signals, while Q3 level-shifts the receive (RX) signals. The negative supply required for the RS-232 port RX input is furnished by the TX line. This line sits in the idle stop-bit state (logic “1” or -12 V) when the interface is set for data input.
Although it works very well at 9600 baud over a short network connection, this circuit is intended for convenience rather than performance. Consider R1 and R2. These line-idle resistors ensure that the interface doesn’t get spurious start bits when all devices are set as receivers. To lower the quiescent current drain, the value chosen for R1 and R2 was 18k instead of the preferred 2.2k. When continuously receiving data, the interface takes about 150 µA from the DTR line. This rises to about 220 µA when transmitting.
Windows TAPI serial communications routines for this interface, written in Delphi, are available on the Web. Go to www.planetee.com and click on the “Ideas for Design” icon.
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