[Design View / Design Solution]
Combat Integration's Dark Side With New Development Tools
Real-time visibility makes a comeback as software developers battle to debug their designs by viewing the inner workings of today’s complex chips.
DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.
Heisenberg stated in his studies that the observer is no longer external and neutral, but rather part of the environment being observed. In other words, the mere act of measurement alters the observation. A similar perplexing situation exists when developing products with the latest microelectronic devices.
The increasing chip-integration levels that dominate today's electronic designs propel the problem. Though designers save size, power, and cost with shrinking geometries, they struggle with what's termed "vanishing visibility." In other words, higher integration levels tend to hide a chip's inner operations.
Conventional development tools can no longer handle the design and debug chores for products that use the newest digital signal processors and microcontrollers. A new trend is under way, however, that involves integrating on-chip debug facilities in an effort to reverse the loss of visibility. Also helping the visibility cause is a new class of tools from chip suppliers and tool vendors.
Nonetheless, every increase in system clock rates threatens the latest debug approaches. This article delves into visibility challenges facing designers, available tools, on-chip technologies that provide visibility, and what the future may hold.
HIGHLIGHTS:
Chip Suppliers' Visibility Challenges
Chip makers face four key challenges in trying to deliver low-cost, visibility-enabled debug solutions: system complexity, hostile applications, debug bandwidth, and applications diversity.
Developers' Visibility Tool Chest
Chip vendors now supply a tool chest that targets the two main classes of visibility problems encountered by developers: algorithm or data-related problems, and program-flow or control-related problems.
On-Chip Technologies Supply Visibility
Four on-chip debug technologies together provide increased visibility in today's chips: trace, triggering, data I/O, and pin management.
What The Future Holds
In the not too distant future, it should be possible to obtain real-time trace with no gaps by using a clock or two, roughly a pin per 100 MHz of CPU clock frequency, and employing conventional single-ended buffers for trace-export transmission.
Sidebar: The History Behind Vanishing Visibility
System visibility has dropped steadily over time, but integration continues to increase. Only recently has visibility rebounded to some extent.
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