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[Ideas For Design]
Keep Standby Power Below 50 mW On Universal Mains

Contributing Author  |   ED Online ID #6192  |   August 23, 1999


The quest for low standby power represents one of the most challenging tasks for switch-mode power-supply (SMPS) designers. This can become a daunting task when tackling very-low-output loads—the efficiency degrades significantly, barely reaching 45% for outputs as low as 300 mW. Thanks to the appropriate technology, the circuit shown draws only 34.8 mW when the load is disconnected (VIN = 85 V ac). The consumption increases up to 44 mW at high line (260 V ac). The efficiency also is good at low loads: 67.45% at POUT = 880 mW and VIN = 120 V ac.

A clever way to build such a lowstandby-power SMPS is by implementing a hysteretic architecture. The operation is very simple: If the output voltage stays below the target, the controller issues high-frequency pulses until the target is reached.

When this condition occurs, the controller stops the output pulse train and the switch is kept fully OFF until the output voltage drops below the threshold. Then a new burst of pulses takes place and so on. In the absence of a load, the controller will deliver packets of pulses that simply compensate the self-discharge of the output capacitor. Just a small amount of energy is necessary to keep the output alive so that the repetition rate of the pulse packet will be low. This results in an insignificant power drain from the source.

This unusual implementation of the circuit employs an MC33363B from Motorola, Phoenix, Ariz. (see the figure). The circuit includes a 700V/1.0-A SenseFET PowerSwitch and a startup current source. The novelty involves combining the high-speed overvoltage protection (OVP) pin with the feedback path. When the OVP level is reached, the internal MOSFET is stopped, leaving the output slowly discharging; when the OVP signal drops below its threshold, the MOSFET is turned on again. The circuit regulates in a hysteretic mode, which is exactly what’s needed.

The MC33363B is a voltage-mode controller combined with a pulse-by-pulse current-limit detector. In this application, pin 10 (Feedback) is wired to the ground so that it runs the IC at the maximum duty cycle (50%). Every output pulse will be interrupted when the primary current reaches the maximum limit.

A nice feature is the flexibility to control the peak current and the oscillation frequency. As a matter of fact, you can easily adjust the peak current to account for the magnetostriction effects of your transformer. Any transformer used on a hysteretic SMPS will generate audible noise at low frequency. You either buy a good transformer that’s well within budget, or, as offered by the circuit in the figure, you must ensure a low peak current. This prevents the transformer from “singing” during hysteretic operation. If the peak current is reduced, either the primary inductance or the switching frequency (controlled by C9) must be increased to keep the output power constant.

The transformer, available from Orega, San Diego, Calif., features a primary inductance of 6.5 mH and auxiliary and power winding ratios of 0.2 and 0.06, respectively. Thanks to its low leakage inductance, a simple RC network must be wired from drain to source. This won’t significantly degrade the efficiency.

The measurement results are summarized in the table for TAMB = 25°C. As you can see, the average input power is kept below 50 mW for the entire universal mains range. Good efficiency levels are maintained even as the output power decreases.


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