Analog-to-digital-converter (ADC) architectures vary greatly in their performance capabilities. ADC application needs are even more diverse. So it should come as no surprise that the development of ADC chips is moving simultaneously in multiple directions.
Chip developers are pushing their new designs to achieve a number of performance goals at varying levels. They're pursuing faster conversion rates, higher resolution, better noise performance, and lower power consumption. Much effort is put into shrinking the package and getting more channels of data conversion in a given package. Often, chip vendors look to integrate the ADC with related functions, such as voltage references or input amplifiers. Or, they may be investigating the best way to integrate ADCs with digital-to-analog converters (DACs) and other functions within the signal chain of a specific system. Although some of these parts enter data-converter catalogs as application-specific standard products, many are true ASICs.
With so many trends occurring simultaneously, vendors of monolithic ADCs can carve out many niches. What results is a wide array of converters optimized for different combinations of application requirements. For example, among high-speed ADCs—those with 10-Msample/s or faster performance—some parts may be optimized purely for speed, while others seek an optimum tradeoff of speed and power. Another factor, cost, counts heavily in many applications and naturally shapes many converter developments.
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