Today's digital-based systems anchor their reliability and performance on the integrity of their clocking systems. Due to the wide-reaching effect these signals have on system performance, it's paramount that problems be located and corrected. Like a good detective, the engineer must ask the right probing questions to determine exactly what is cause and what is effect.
Fixing the effect is a less than optimal solution and may allow the guilty party to escape and commit an even more serious timing crime later. For example, suppose there's a smoking bypass filter at the scene of the crime (high jitter, badly shaped waveforms, or design parameters that aren't being met). It must be proven to be the cause and not a piece of the evidence trail that leads back to a less than obvious source. Possibly the capacitor was used in "self defense" against noise in a frequency band that it couldn't protect the clock device from.
A correct-for-design termination circuit that becomes incorrect because of inappropriate source-driver-component impedance is another good example. That is, a 50-Ω termination impedance for a 50-Ω characteristic impedance transmission line is usually, but not always, correct for maximum signal integrity. The instinctive reaction is to tune the terminator for the circuit. But this will disrupt the impedance of the transmission line connecting the driver and termination. Indeed, the obvious source of trouble is very often far from the real cause.
It's best to correct this problem at its root cause by choosing an appropriate driver, rather than waste time tuning the terminator to a working but less than optimal result. By correcting the root cause, you may also fix other problems that aren't significant enough to cause timing violations but, nonetheless, degrade the timing margin.
We must also be aware that failure may not be caused by a single and easily identified source. Failure may result from several slightly out-of-spec timing entities that together push a timing edge past a limit.
For instance, the combined effects of a marginal ground, incorrect bypass component values, and poor trace-routing topologies can produce enough noise to cause a failure. To make matters even more difficult, clock components are connected to power and ground planes that are shared with the rest of the design. Thus, they're affected by the noise environment of the system they control. There's little wonder that finding the problem's root cause is so difficult.
TIME DOMAIN
The first view we have into the crime scene is time-domain information. Things displaced in time from each other typically show up as skew and delay, causing timing events to be regularly or irregularly displaced in time from the desired point of occurrence. They have two prevalent root causes: deterministic-jitter and random-jitter noise sources.
Deterministic jitter can be absolutely traced back to a root source. The displacement is regular and has a discoverable periodic occurrence or fingerprint. By reading the time displacement of the period peaks on a multimodal distribution measurement (Fig. 1), you can often quickly determine the aggressor signal's frequency. Once that's accomplished, finding the absolute source is only a few steps away.
Random jitter is a little more of a problem. It can come from the components themselves or be passed forward from devices that drive the offending component.
FREQUENCY DOMAIN
The other important view of clocking problems lies in the frequency domain, where we observe the energy distribution at and around the desired frequency in time. Clocking systems demand fast rise times to minimize transitions through the loads' switching threshold region. This adds many odd harmonics to the spectral content of the clock. (A pure square wave with infinite rise time is a sum of the fundamental and all of the odd harmonics of the desired frequency.) In the frequency domain, we're looking for the results of other clocks mixing with the desired clock frequency.
Four mixing products are created when clocks modulate each other: the sum, the difference, and the two initial frequencies. In most cases, the aggressor frequency will be quite close to the desired frequency, as will be the resulting sum and difference products.
ROGUES GALLERY
Often an event is noted, but it's not the actual source of the problem. Consider the kingpin of timing issues—jitter. Jitter takes many forms in clocking systems. Sometimes jitter can be analyzed and the exact frequency of a guilty aggressor signal can be determined.
Sometimes jitter is a gang of misbehaving sources that, together, tip the scales and raise the noise level. The sources often are so complex in nature that a great deal of evidence must be gathered to develop a path of attack to even collect the magnitude and source of the relevant data. An example of this is excessive electromagnetic interference (EMI), where electromagnetic energy, in the form of electromagnetic waves, escapes the very transmission lines created to contain them.
While locating the existence of the noise is routinely performed with FCC and other organization-mandated testing, correcting the source is often seen as an art. Major noise sources have several typical causes to track down.
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