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[Design Application]

Proven Methods Create Logic-Analyzer Triggers That Work


Don't Depend On Your Programming Knowledge. Instead, Break The Problem Into Parts And Take Advantage Of The Instrument's Built-In Functions.

Contributing Author  |   ED Online ID #7496  |   October 28, 1999

Article Rating: Not Rated

Setting up logic-analyzer triggers is often difficult and time consuming. You might think that a knowledge of programming would make the job a snap. But that's not the case, since many of the key concepts you need to know are unique to logic analysis. Understanding these concepts and how to use them effectively is the best way to avoid problems while setting up triggers that do the job properly.

Compare the memory of a logic analyzer to a very long conveyor belt. The samples acquired from the device under test (DUT) are boxes on that belt. At one end, new boxes are continuously placed on the conveyor belt. At the other end, the boxes fall off. In other words, logic-analyzer memory is limited in depth (number of samples). So if the memory is full, the oldest sample currently in memory will be bumped out whenever a new one is acquired.

In essence, a logic-analyzer trigger does the equivalent of looking for a special box and stopping the conveyor belt when that box reaches a particular position on the belt. That special box is the trigger. Once the logic analyzer detects a sample that matches the trigger condition, it waits until the trigger is located appropriately in memory. It then stops acquiring further samples.

The location of the trigger in memory is known as the "trigger position." Normally, this position is set to the middle so that the maximum number of samples that occurred before and after the trigger are in memory. You can set the trigger position to any point in memory, however.

While logic-analyzer triggers are often simple, implementing them can require complex programming. For example, you may want to trigger on the rising edge of one signal, which is followed by the rising edge of another signal. The logic analyzer must find the first rising edge before it begins looking for the second one. Since there is a sequence of steps to find the trigger, this is known as a "trigger sequence." Each step of the sequence is called a "sequence level," or a "state."

Every sequence level consists of two parts: the conditions and the actions. The conditions are Boolean ex pressions such as, "If ADDR = 1000" or "If there is a rising edge on SIG1." The actions are what the logic analyzer should do if the condition is met. Examples of actions include triggering the logic analyzer, going to another sequence level, or starting a timer. This is similar to an If/Then statement in programming.

In the trigger sequence, each sequence level is assigned a number. The first level to be executed is always Sequence Level 1. But because of the "Go To" actions, the rest can be executed in any order.

When a sequence level is executed and none of the Boolean expressions are true, the logic analyzer acquires the next sample and executes the same sequence level again. As a simple example, consider the following trigger sequence:

  1. If DATA = 7000 then Trigger

If the following samples were acquired, the logic analyzer would trigger on Sample 6.

Sample ADDR DATA
1. 1000 2000
2. 1010 3000
3. 1020 4000
4. 1030 5000
5. 1040 6000
6. 1050 7000
7. 1060 2000


Sequence Level 1 simply means, "Keep acquiring more samples until DATA = 7000, then trigger."

Even if a Boolean expression in a sequence level is met, another sample is always acquired before executing the next sequence level. In other words, if a sample meets the condition in Sequence Level 1, another sample will be acquired before executing Sequence Level 2. It is not possible for a single sample to be used to meet the conditions of more than one sequence level. Each sequence level can be thought of as representing events that occur at different points in time. Two sequence levels can never be used to specify two events that happen simultaneously.

For instance, consider the following trigger sequence:

  1. If ADDR = 1000 then Go to 2
  2. If DATA = 2000 then Trigger

If the following samples were acquired, Sample 1 would meet the condition in Sequence Level 1. The logic analyzer would trigger on Sample 7.

Sample ADDR DATA
1. 1000 2000
2. 1010 3000
3. 1020 4000
4. 1030 5000
5. 1040 6000
6. 1050 7000
7. 1060 2000


Note that the logic analyzer will not trigger on Sample 1, because a new sample is acquired between the time the condition in Sequence Level 1 is met and the condition in Sequence Level 2 is tested. Think of this trigger sequence as "Find ADDR = 1000 followed by DATA = 2000 and then trigger." Multiple sequence levels in a trigger sequence imply a "Followed By."

Once a logic analyzer triggers, it doesn't trigger again. Even if more than one sample meets the trigger condition, the logic analyzer only triggers once. Using "ADDR = 1000" as our trigger, if the logic analyzer acquires the following samples, it will trigger on Sample 2 and only on Sample 2.

ADDR  
0000  
1000 (Trigger)
2000  
1000 (No trigger)
1040  
1060 2000


So if you set up a trigger condition that is never met, the logic analyzer will never trigger.

Suppose the conditions are met in a sequence level. It is clear which sequence level will be executed next when a "Go To" action is used. But whether there is no "Go To" isn't necessarily apparent. On some logic analyzers, if there's no "Go To," this means that the next sequence level should be executed. On others, the same sequence level should be executed again. Due to this confusion, it's good practice to always use a "Go To" action rather than relying on the default. In fact, the HP 16715A state-and-timing module deals with this problem by automatically including a "Go To" or "Trigger" action in every sequence level.




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