[Design Application]
Use Programmable DSPs For Cost-Effective PCI Digital Audio Design
Balancing The Workload Between Host CPUs And DSP Accelerators Brings Performance Closer To That Of Dedicated Hardware Accelerators.
Designing computer systems involves difficult cost-performance trade-offs. It's a given that systems offering the highest performance levels--high concurrency, sophisticated new features, and the highest quality levels--will always require hardware acceleration. At the other end of the spectrum, the increasing performance of host processors will never outpace the growing demands of applications for additional computation. But shrewd designers can find a successful middle ground between the two extremes. By way of illustration, consider what's happening with PC audio.
PC audio is undergoing a profound metamorphosis. Driven by new 3D games, published DVD movie content, and live audio downloaded from the Internet, future PCs will be offering more audio-related features and higher levels of performance. Music synthesizers will sound more realistic and be capable of creating a wider variety of sounds. It will be possible to position sound effects 360° around the listener without the expense and hassle of wiring additional rear channel speakers. Users will be listening to 5.1-channel sound tracks from DVD as well as musical accompaniment to Internet web sites. These applications are only the tip of the iceberg.
However, these new capabilities can only reach mass market prices through architectural innovation. Audio signal processing consumes significant computational resources. Running all the audio functions on the host processor attenuates system performance on other applications. Hardware accelerators preserve the performance of the host CPU, but they add cost. Innovative system design minimizes the additional cost and saves system performance.
Audio Accelerators Needed System architects have a spectrum of options available for implementing audio subsystems that trade hardware cost for performance. The ends of the spectrum are well-defined. At one end are the basic, sub-$1000 systems. They run most signal-processing tasks on the host CPU, an architectural philosophy known as Host Signal Processing (HSP). This is done using an audio codec to provide baseline recording and playback functionality. At the other end are the performance systems. They rely on hardware ASICs or DSPs to implement signal-processing tasks.
To understand the rationale for adding hardware acceleration, hypothesize a set of signal-processing functions at a particular performance level, running entirely on the host CPU. Recognize that each real-time audio task steals cycles from other graphics, data, or numeric processing tasks. So, above 10% to 20% loading, the signal-processing burden detracts noticeably from the execution speed of the applications.
For example, a game's graphics will be noticeably slower; the game might respond to user control more sluggishly. Consumers who purchase a computer with a 300-MHz Pentium processor, half of which is consumed by signal-processing tasks, will find that applications will run as if the computer had a 150-MHz Pentium processor. Also, cramming too many real-time algorithms on the host CPU can lead to unstable systems with high technical support costs, and ultimately consumer disappointment and frustration.
After defining a set of signal-processing functions that do not impose an excessive burden, consider the following three points:
* Signal-processing capabilities span a range. If the baseline system includes a wavetable synthesizer with 24 voices, adding a hardware accelerator could increase the number of synthesized voices to 64.
* Signal-processing performance spans a range. Many classes of algorithms sound or work better when more computational horsepower becomes available, and the demand for MIPS always seems to be insatiable.
A wavetable synthesizer, for example, could use "layering" (the application of more than one oscillator per voice) to make the synthesized sound more realistic. Adding even a single additional layer essentially doubles the computational requirements, and high-quality synthesizers often provide three or four layers. Adding a hardware accelerator improves sound quality in the case of wavetable synthesis.
* Signal-processing concurrency spans a range. If a hypothetical system offers wavetable, adding a hardware accelerator could make it possible to offer 3D positioning and a hands-free speakerphone as well. There is no limit to the cleverness of algorithm designers, so there will always be other useful algorithms cropping up. To run them concurrently would require PCs equipped with hardware accelerators.
More sophisticated capabilities, higher levels of performance, and concurrency all require more computation. This additional capability can be provided at any given time by a hardware accelerator, or perhaps in the future by faster CPUs. Thus, performance systems are bellwethers. As CPUs get faster, PCs using them may acquire additional capabilities that previously required hardware accelerators to implement. However, the other applications also will increase their computational requirements, limiting the CPU performance available for signal processing. Consequently, it's very difficult to predict when host processors will be sufficiently powerful to run not only today's signal processing tasks, but also tomorrow's applications. These two architectural philosophies, host signal processing and hardware acceleration, define the endpoints of the spectrum of implementation options.
The Balanced Architecture The vast middle range of the spectrum is served by an elegant "Balanced Architecture." This architecture makes it possible to achieve approximately the performance of the high-end systems at mainstream consumer price points. The Balanced Architecture reconciles the conflicting objectives above by using a hardware accelerator and the host CPU in a uniquely synergistic manner (see the figure).
This reference design of the Balanced Architecture from Analog Devices is called SoundMax 64 with dynamic interprocessor voice allocation (see "The AD1818A-Based SoundMax 64 Accelerator below,"). Additional features include:
*Sample rate conversion from as many as eight independent sample rates, and mixing of the results.
*DirectInput-compatible analog/ digital game port support for joysticks such as Microsoft Sidewinder.
*Chorus, reverb, parametric filtering, and dynamic LPF audio effects.
*ACPI- and On Now-compliant PCI power management.
To understand the Balanced Architecture concept, consider first the characteristics of the hardware accelerator. The ideal hardware accelerator (for either dedicated or balanced architectures) incorporates both a programmable core and some fixed-function circuitry. The programmable core preserves the advantages of programmable systems. These advantages are:
* Software solutions afford the possibility for the same hardware to be reconfigured to serve multiple functions--for example, a Dolby Digital decoder in a DVD playback scenario or a wavetable synthesizer in another.
* Software solutions allow field driver upgrades to support evolving standards--for example, alternative multichannel audio decoders such as MPEG-2, DTS, or Sony's new DSD standard.
* Software solutions accelerate development. Bugs in fixed-function hardware require redesign and modifications to masks; bugs in software can be fixed by changing the code.
* Software solutions make it easy to accommodate OEM customization
in audio algorithms and feature sets such as dynamic equalization for a specific set of OEM speakers.
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