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[Design View / Design Solution]
Connect PCI Express Subsystems With Advanced Switching Fabrics
Your host and I/O subsystems can continue to run legacy PCI Express/PCI code while the AS standard operates as the system switching fabric.

John Gudmundson  |   ED Online ID #7895  |   May 10, 2004


DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.

Current parallel backplane technologies are rapidly being replaced with advanced serial-I/O-based solutions. Two such open standards include PCI Express Base and Advanced Switching (AS). These new technologies recognize the prevalence and widespread use of legacy software yet offer advanced features.

Possessing full code compatibility with PCI/PCI-X-based software, PCI Express technology is being deployed in fabrics as well as in host and I/O subsystems. With support for nontransparent bridging, used in PCI for many years, PCI Express solutions can create complex multihosted designs.

When solutions based on AS—including its full physical and data-link layer compatibility with PCI Express Base and its advanced features—become available, high-end designs will migrate to a mixed PCI Express/AS solution. Host and I/O subsystems will continue to run legacy PCI Express/PCI code, and AS will operate as the system switching fabric.

Because PCI Express Base and AS have divergent transaction layers, these switches/bridges are necessary to ensure compatibility with both standards. Each of the switch's interfaces must ensure compatibility with both standards. It's crucial that the switch provide complete protocol interoperability including, but not limited to, translation of routing techniques, enumeration of PCI Express subsystems across an AS fabric, queue management, and the ability to ensure transaction ordering to prevent deadlock.

This article investigates how to intertwine the two technologies via PI-8 switching devices. Using these switches will ensure proper translation of routing methods and provide system configuration, buffer-management techniques, and a transaction ordering process to bridge the different methodologies of each standard.

HIGHLIGHTS:
"Path Routing" PCI Express Packets Unlike address routing employed in PCI and PCI Express Base, packets in an AS domain are routed via a path description. AS routes PCI Express packets through the AS fabric by pre-pending an AS route header.
"Binding" PCI Express Base To AS A PI-8 bridging mechanism is implemented as a PCI-Express-to-AS switch at both host and I/O nodes of an AS fabric.
Switch Initialization The host switch, which presents itself as a PCI Express switch as enumeration software probes the RC subsystem, enables the software to discover I/O switches and devices attached to them through the AS network.
Buffer Management Two buffer-management choices reside on the PCI Express side of the switch: PCI Express control logic can return credit to its interface when the packet crosses the internal boundary between PCI Express Base and AS, or when the packet is injected into the AS fabric.
Maintaining Order AS ordering and deadlock avoidance rules offer compliance with these same rules for PCI Express Base, even though they're not identical.

Full article begins on Page 2


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