[Leapfrog: First Look]
Trimmable Analog IP Blocks Come Fully Armed With Power Management
Innovative laser-trimming technology for Bluetooth and Wi-Fi SoCs brings total on-chip power management.
A new weapon in the arsenal for designers of Bluetooth and Wi-Fi (802.11) system-on-a-chip (SoC) ICs provides low-cost, ultra-accurate trimming of nearly all power-management circuits. By leveraging its know-how in accurately laser-trimming CMOS substrates, LTRIM Technologies created PowerTrimPak analog IP blocks that address the specific power and space-constraint needs of Bluetooth and Wi-Fi systems.
The blocks include the functional analog power-supply circuit, which can be accurately laser-trimmed to simplify designs and streamline power-management functions. "We implant our IP in the substrate. That's a new way of doing things," says Guy Lemieux, LTRIM's CEO. "Our tools are designed for optimizing the growing market of analog designs."
"The entire power-management function with laser-trimming capability is integrated on the same chip as the digital function. Instead of a separate digital SoC and an external analog IC, the analog circuit is integrated on the digital SoC," says Yves Gagnon, LTRIM's CTO.
Laser trimming is performed via software by adjusting the value of standard silicon-diffused resistors, with no changes occurring to the CMOS manufacturable process nor any damage to the silicon structure. PowerTrimPak analog IP blocks are available for the entire gamut of power-circuit design functions. These include battery-charge monitoring, battery chargers, charge-pump converters for flash memory voltage, dc-dc buck/boost converters, dc-dc buck/step-down converters, dc-dc boost step-up converters, inverted charge-pump converters for memory back bias, low-dropout (LDO) voltage regulators, power-management controllers (digital), reverse battery protection, and voltage references.
Laser-trimmable functions include battery-charge monitoring, battery charging (with laser-tunable Rsense), LDO voltage regulation, temperature sensing, and the voltage reference (see the figure). "We're achieving resistor-trimming accuracy down to within 0.001%, without the need for a clean-room environment, which is a lot less expensive than thin-film trimming," says Lemieux. "Depending on the resistor's complexity, where it fits into a circuit, and the number of trims needed, costs can vary from fractions of a cent up to two to three cents." Using LTRIM's analog IP blocks entails a one-time licensing fee of $20,000 to $100,000.
"You also increase a design's flexibility and the circuit's reliability due to a lower component count with our ultra-fine trimming and low-cost technology," says Mazen Allawi, LTRIM's director of marketing.
Customers can choose to use one or more analog IP function blocks separately, or they can be combined into a single block. Macro models are available for simulation, as are data sheets with a user's guide.
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