Aerial transmission over FR-4 backplanes of up to 6.25 Gbits/s, with trace lengths up to 30 in., is now possible for multigigabit switch, router, storage-area-network, and server backplanes. Slicing through the Gordian knot of jitter is the EQ50F100, an analog equalizer from National Semiconductor.
The circuit's equalizer block compensates for high-frequency attenuation in the backplane system, while the limiting amplifier boosts the signal from the equalizer block. The offset-cancellation circuit corrects for internal mismatch and offset from the previous stage to minimize duty-cycle distortion.
By compensating for transmission medium losses and reducing the medium-induced deterministic jitter in printed-circuit backplanes, the equalizer can achieve data rates reaching 6.25 Gbits/s (see the figure). I/O in the EQ50F100 uses current-mode logic (CML). Furthermore, the device provides 8 kV of electrostatic-discharge protection.
The EQ50F100 can be paired with the company's SCAN50C400 quad serializer/deserializer (SERDES) transceiver to extend signal reach. This also allows the SERDES to transmit 5-Gbit/s signals across legacy backplanes that were originally designed for lower data transfer rates.
The equalizer meets data rates for the 10 Gigabit Attachment Unit Interface (XAUI), Fibre Channel, and Advanced Telecom Computing Architecture (ATCA) backplanes. Packaged in a 3- by 3-mm LLP, the EQ50F100 is priced at $4.95 in 1000-unit quantities.
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