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[Ideas For Design]
Double Your Output Current With Parallel Voltage Regulators
Sense resistors in series with the load can force current sharing between regulators, but using low-side sense elements yields even better results.

Wayne Rewinkel  |   ED Online ID #9270  |   December 8, 2004


To improve efficiency in high-power applications, voltage regulators can be used in parallel to double output current capability—if a means of forcing current sharing is provided.

One circuit approach uses sense resistors in series with the load and is applicable to regulators of any type. With a slight modification, it can be placed ahead of the regulators sensing input current. Another method is most applicable to synchronous switchers since it requires the presence of a low-side sense elements, which can be resistors or FETs.

There are times designers may want to parallel regulators to double current or improve efficiency. These include instances when:

1. One wants to use a linear regulator or IC switcher with integrated power FETs, but its maximum current rating is exceeded.

2. A single IC's temperature rise is greater than can be tolerated for surface mounting.

3. Efficiency improvements are justified by reduced total cost or increased battery life.

4. A high-output current requirement dictates a two-phase design. The benefits of dual-phase switchers for high-current applications are widely known. But many dual-phase IC controllers do not provide a way to easily parallel outputs. This is especially true for voltage-mode controllers.

Figures 1a and 1b show adjustable regulator blocks connected in parallel. The feedback (FB) voltages for Figure 1a are with respect to Gnd, while Figure 1b shows three-terminal devices having FB referenced to VOUT. At this stage of discussion, the regulator blocks can be either linears or switchers.

Most voltage regulators use a high-gain feedback loop to slave VOUT to an internal voltage reference so that an error signal at the feedback pin of only a few millivolts will cause a full-scale change at VOUT. The negative feedback with high gain forces VOUT to be a linear function of VREF and the feedback resistor ratio as defined by:

(For Fig. 1a)

VOUT = VREF(RF2/RF1 + 1), where VREF equals VFB (the voltage at FB)       (1)

(For Fig. 1b)

VOUT = VREF(RF1/RF2 + 1) where VREF equals VOUT ­ VFB       (2)

DC errors are mainly determined by VREF accuracy and tolerance of the feedback resistors. When two like regulators are connected in parallel, a small difference in VREF will cause one regulator to source nearly all of the load current until it reaches the current limit. Then, its VOUT will droop until the second regulator, with slightly lower VREF, begins sourcing the remaining load current. Operation in this manner can be acceptable if dissipation and device temperatures remain low enough to avoid thermal cycling.

As load current and regulator dissipation increase, the regulators must share current, so some circuitry must be added to accomplish this. Figures 2a and 2b include RSHARE resistors in series with each output to supply predictable sharing at maximum load current. RSHARE is chosen so the voltage dropped across it at full load is several times larger than the maximum difference voltage between the regulators. Then:

VOUT = VREG1 ­ (IREG1 × RSHARE) = VREG2 ­ (IREG2 × RSHARE) (3)


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