William Wong
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ED Online ID #20190 |
November 24, 2008
A couple of things have kept designers away from FPGAs, including size, price, power, and complexity. Actel’s Igloo nano blasts away these issues (see the figure). The smallest version is available in a 3- by 3-mm package while still delivering 10k system gates. The price starts at less than $0.50.
The Igloo nano’s FlashFreeze mode locks I/O while the chip powers down. Its low-power mode can draw as little as 2 µW, which is better than many complex programmable logic devices (CPLDs).
These characteristics may lead to new approaches to FPGA use since it is now possible to utilize multiple chips and power down one or more when they aren’t in use. Right now, it is impossible to power down sections of a large FPGA. You can only power down the whole chip.
Even the smallest chip in the family can pack in a small microcontroller like the CoreABC with space left over for custom logic. The family scales up to 8- by 8-mm packages with 250k gates and 63 kbytes of SRAM with a number of chip options priced under $1.
The larger versions can handle the ARM Cortex-M1 core. The I/O can manage 1.2- to 1.5-V interfaces, hot-swap support, and Schmitt trigger inputs. The extended temperature range of –20°C to 70°C is standard, making the family ideal for consumer applications. The starter kit is priced at $49, giving it a very low cost of entry.
Actel is promising a zero-week delivery schedule for the chips for high-volume customers. This puts it on par with the off-the-shelf microcontrollers that the Igloo nano could replace.
The company’s Libero integrated development environment (IDE) supports the Igloo nano. FPGA configuration by menu selection isn’t quite there but it’s close, requiring significantly less expertise than a couple of years ago. It is definitely time to take a closer look at FPGAs.
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