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[Technology Report]
Dynamic Performance Is The Mantra For Analog And Mixed-Signal ICs
Third-generation communications applications are calling for improved dynamic range over a much wider bandwidth.

Ashok Bindra  |   ED Online ID #1028  |   January 10, 2000


The wideband amplifiers that drive these speedier ADCs must move forward at the same pace. Thanks to advances in CMOS and biCMOS, the horizon holds the required faster slew rate, higher output drive, and rapid settling times with single-supply operation and extremely low quiescent current. From today's 14-bit accuracy, suppliers are readying 16-bit versions with the same bandwidth at 3-V operation. And full-power bandwidth is being driven to 350 MHz at 5 V and below.

As data-converter designers begin to tap 0.25-µm and finer CMOS geometries, suppliers will be motivated to bring RF functions, such as mixers, local oscillators, and amplifiers, on board. Some visionaries even foresee the integration of RF with ADC, DAC, DDC, and DSP on the same monolithic chip (Fig. 2). In short, the integrated ADC front end will evolve into a full-fledged radio transceiver, including an on-chip low-noise amplifier (LNA) and power amplifier. It will facilitate the concept of a direct-conversion receiver.

In handsets, where the output power needed is below 1 W, integrating the power amplifier on board is commercially feasible. Designs and fabrication processes are rapidly advancing to deliver a phone-on-a-chip in the next few years. But implementing it in the base-station transceiver, where over 100 W of power is delivered from the power amplifier, brings up another question altogether.

To realize this degree of integration, manufacturers will tap a biCMOS process with SiGe bipolar transistors for RF implementation. Needless to say, conventional biCMOS will eventually progress to deliver ultra-fast bipolar transistors that can match the speeds of SiGe bipolars at a lower cost. Until the analog CMOS migrates to 0.25-µm design rules, however, putting all of the RF, analog, data-converter, and DSP functions on one chip is an arduous task. Presently, the CMOS process exploited by analog and data-converter designers is the 0.35-µm geometry. The transition to 0.25 µm is projected to begin around the end of this year.

New standards like EDGE and 3G seek power amplifiers with better output linearity and efficiency. Sure, gallium-arsenide-based MESFETs and HBTs continue their stranglehold on the power arena. This is especially true in the handset applications, where higher output power at low voltages is the name of the game. But the scenario in base-station applications is rapidly changing. The silicon-derived, lateral-diffused MOS (LDMOS) transistor has recently advanced in linearity, efficiency, peak power capability, input/output impedance, and cost/watt features. These features improve its position in the 2-GHz arena.

Key proponents have addressed the bias-current drift problem that's plagued this structure at peak power levels of 100 W and above. Actually, the above improvements have further enhanced the long-term reliability and ruggedness of the silicon-based power transistor.

LDMOS Sets Sights On Wireless
Life for LDMOS devices also has become easier with the availability of 28-V power supplies. LDMOS is poised to make inroads into the power sector of the upcoming wireless-infrastructure systems. Major developers tout their transistors as viable solutions for linear power amplification in wideband-CDMA (W-CDMA) and IMT-2000 standards-based wireless base stations, which operate at frequencies up to 2.4 GHz. Several are even prepping power modules that include the improved LDMOS power transistors, starting at 50 W and going up to 120-W peak output power.

Some of these modules will enter production in the first half of the year, nurturing efforts to get even higher output power and better power-added efficiency (PAE). At RF frequencies, LDMOS-derived power amplifiers still trail behind their GaAs counterparts in power efficiency. Narrowing this gap is the central focus for supporters of this technology. Providers expect to accomplish that task within a year or two, while squeezing more juice out of the power amplifier. Ongoing research activity suggests that the makers of LDMOS power transistors intend to achieve a 30% to 35% improvement in the output power within a year's time frame.

Meanwhile, work is in progress to scale these devices to lower voltages, suiting them for new-generation cellular phones. In this case, 1- to 2-W output power at 2-GHz operation suffices. By refining parasitics and feedback capacitance, suppliers hope to achieve nearly 60% PAE at greater than 1-W output. LDMOS would then stand as an attractive alternative for new-generation handsets, which GaAs solutions dominate today.

The SiGe HBT also is in this power race, eyeing the design slots in emerging cellular phones. Some key vendors have released 3-V, SiGe HBT-based power amplifiers capable of providing 35-dBm output power with 50% PAE. They've been crafted for use in 900-MHz GSM systems, but improvements are in the works to raise the frequency spectrum to the 1.8- to 2.0-GHz range. Developers want to make such units suitable for a line of GSM products using 1800- and 1900-MHz carrier signals.

Proponents of GaAs aren't going to sit by idly, however. They're watching these developments and aggressively addressing the cost issues. Cost has been a major hurdle for these parts. To maintain the dominant position of GaAs, suppliers are migrating to larger wafers. This move should cut costs while providing the same benefits of performance and high efficiency.

In the handset arena especially, the trend is to convert dual-supply designs to single-supply operation. Designers are seeking alternatives to the GaAs metal-semiconductor FETs (MESFETs) and pseudomorphic high-electron-mobility transistors (pHEMTs) that use negative and positive supplies for amplification. So it's not surprising to see gallium-arsenide bipolars flexing their muscles on this plane.

SiC MESFETs
Meanwhile, silicon-carbide-based MESFETs are slowly but steadily inching forward to steal the spotlight in future infrastructure equipment. With the recent demonstration of 2-GHz SiC MESFETs operating from one 48-V supply, their prospects for serving the power requirements of next-generation base stations look bright. Although the power density offered by these MESFETs is high (4 W/mm at 1.8 GHz), the output power is limited to 10 W continuous. They're likely candidates for the driver section in the near future. As power capability improves in a year or two, they also should be ready to deal with the main power amplifier.

With so many technologies available for power amplification in next-generation systems, the competition is bound to heat up. Unlike previous years, there won't be one dominant technology. Selecting the right solution will depend on the designers' understanding of all competing technologies.


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