VIDEO PROCESSORS As designers take full advantage of complex HDTV signals, they need to deal with computationally challenging codecs and post-processing. Currently, parallel data processes dominate this computation. Couple that challenge with the ever-increasing costs associated with building ASICs based on leading-edge process technology, and you're looking for solutions such as Connex Technology's CA1024 (Fig. 3). This massively parallel system-on-a-chip (SoC) can process complex HDTV signals.
ASICs and ASSPs can quickly become outdated with the rise and fall of the latest codec and display processing algorithm. Not so with the CA1024. It can support any codec and post-processing algorithm without additional logic by using its massive array of simple processor cores optimized to exploit inherent digital-video data parallelism.
In addition, the CA1024 includes a memory structure with enough bandwidth to handle multiple high-definition video streams. And unlike reconfigurable gate-array alternatives, the device provides a compact, homogenous vector processor.
"Optimized for high-definition (HD) digital video processing, Connex has developed a massively parallel microprocessor architecture that provides customers with the performance and cost of ASICs while providing a sequential programming model in high-level C," says Anand Sheel, vice president of product management at Connex Technology.
"Large-tier customers have shown a tremendous desire to be able to implement their proprietary IP. The CA1024 will allow Connex to be uniquely positioned to address this growing market demand in a highly competitive landscape at cost effective prices," Sheel adds.
The CA1024 supports dual MPEG-2 transport streams and simultaneous decoding of dual HD H.264, VC-1, and MPEG-2 video (Fig. 4). Yet it leaves enough processing bandwidth to support simultaneous advanced pre-and post-processing signal algorithms. For more process-hungry applications, it offers linear scalability by allowing multichip implementations using expansion ports.
Applications include the high-definition set-top box (STB), integrated digital TV (iDTV), digital media adapter, and multistream digital video recorder (DVR). Other features include:
Two configurable A/V channels
Support for any combination of BT.601/656, 8/16/24-bit RBG/YCrCb, and MPEG-2 TS
2x I2S audio input
Dual 656/709 SD/HD digital video outputs
4x I2S or 1x S/PDIF digital audio output
Dedicated MPEG-2 DVB/ATSC-compliant transport
Integrated "glueless" DDR DRAM controller
Dual-stream audio and HD video decode
HD video encode/transcode
Audio encode
Glueless NOR flash
On-chip 32-bit host CPU.
Connex Technology offers development kits with application-specific reference designs, board support packages, and relevant software development kits to get you up and running quickly. The CA1024 will cost $30 in quantities of 10,000 units. It's expected to sample later this year.
Meanwhile, Philips unveils a new generation of Nexperia hybrid television processors that support ATSC and NTSC broadcast standards and target the LCD TV market (Fig. 5). Built on 90-nm technology, they deliver features typically only associated with high-end televisions. The Nexperia PNX8535 includes:
A silicon tuner front end with integrated VSB/QAM channel decoder
An image co-processor that provides 16 picture enhancement features, such as edge-dependent de-interlacing, noise-reduction algorithms, MPEG artifact reduction, and a 3D comb with auto-adaptive 2D/3D switching
Digital-sound-processing algorithms that support standards like Virtual Dolby and SRS TruSurround
32-bit RISC and very long instruction-word processors with instructions optimized for video processing
An MPEG-2 decoder capable of decoding MP@ML and MP@HL streams
A DVB/DES/MULTI2-compliant transport stream de-multiplexer/ descrambler
An analog audio decoder for demodulation of sound sources, such as FM A2, BTSC, EIAJ, and NICAM
Digital-IF decoding for Low-IF and Direct-IF sources
A 1f/2f analog video decoder that converts CVBS or Y/C signals into YUV format and supports PAL/NSTC and SECAM
Support for the reception of all analog and digital U.S. public broadcast standards.
The PNX8535's external interfaces include a 90-Mpixel/s low-voltage differential signaling transmitter and HDMI/DVI receiver that supports HDCP. Also included are two video digital-to-analog converters, a digital 24-bit RGB output, and a high-speed DDR1/2 memory interface. And, its complete production-ready hybrid analog/digital television software stack includes a reference user interface and tools for customization.
Furthermore, a hardware and software reference kit (TV520/20) supplies the necessary components required to build an analog/digital television. The kit includes middleware and application software with a common GUI that allows for optimized picture settings for either analog or digital streams. With it, TV manufacturers can produce a bill of materials totaling less than $45 for the required analog and digital processing functionality.
"The Nexperia TV520 family is expressly designed to facilitate the transition to digital TV at very competitive price points," says Jos Klippert, marketing director, digital TV solutions, Philips Semiconductors.
"Today, people want to have digital reception functionalities on the TV and with this become truly connected consumers," he adds. "As high-definition TV content becomes increasingly available, they are seeking LCD TVs that offer the highest-quality viewing experiences in both analog and digital at an affordable price. LCD TVs built on the TV520 family are ideally positioned to fulfill both those needs and will greatly expand the market for new TV technology."
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