Uniform distribution
In the uniform distribution method, decap cells are placed throughout the design as normal standard cells between row power and ground rails (Fig. 1). The decaps have a statistically uniform distribution with the pre-determined percentage of the cell area. Note, however, that this is a uniform random distribution based on a percentage of the total available floorplan area that results in an irregular placement pattern (in contrast to a regular grid as in Figure 1).
This approach has a two-step process. The first step is to pre-place decaps (before placing the standard cells) using uniform distribution with 6% average recommended area allocation for decap cells. We fix the placement of these cells so that they’re not removed at subsequent design stages.
The second step is to perform post-route incremental decap placement based on the results of intermediate power-density analysis and voltage-drop analysis, budgeting 1% to 4% of the area. This step, which is usually done at the engineering-change-order (ECO) cell and filler insertion stage, may actually remove some decaps in low-activity areas of the design.
With the above as a guide, the worst-case decap area allocation on a global basis would be between 7% and 10% of the core physical area. Bear in mind that because of the dynamic nature of power optimization and analysis, this process is an iterative one; these numbers may require adjustment on the way to design closure.
After early estimation and planning, the flow proceeds to implementation and refinement, which consists mainly of estimating the number of “gate-array” decap cells you need in addition to the floorplanning-based decap cells. These special gate-array ECO cells can be wired as decaps when not required for an ECO. This approach is an alternative to a conventional spare-gate insertion methodology.
The final signoff phase of the decap flow requires detailed dynamic voltage-drop analysis with one or more vector-based activity (VCD) files from gate-level simulations. A dynamic rail-analysis tool such as Synopsys’ PrimeRail should be used for this purpose. The analysis scope is limited to the digital core (top level plus all underlying major blocks).
It’s also advisable to use a static analysis tool such as Synopsys’ AstroRail to verify power-grid integrity and static voltage drop. The PrimePower-to-AstroRail and PrimePower-to-PrimeRail interfaces, which use binary files, allowed the use of instance-based power information. Although a PrimePower-to-PrimeRail link was used for this example, a newer PrimeTime-PX-to-PrimeRail link is now in place.
It’s sometimes difficult, time-consuming, and disk-space intensive to generate the necessary VCD files. As an alternative, you can employ the same statistical switching estimates used to constrain the design through synthesis and dynamic rail analysis. The caveat is that the results are usually pessimistic. More pessimism can be introduced with clock-gated designs, so this should be taken into account.
Initially, you can verify the design using A/B comparisons, with the goal of showing the relative improvement in worst-case voltage droop. This approach also allows you to determine if the tool is producing the expected results or if you need to make general setup/configuration changes. After reaching that milestone, you can use the results to determine whether you have to modify decap density estimates or obtain additional characterization data.
Insert decaps at block and top level
Although planning is done at the top level and a uniform distribution is assumed to simplify calculations, it’s best to begin decap insertion at the block level. Each block has a uniform decap distribution, but the decap densities vary from block to block. This non-uniform distribution across the die (when viewed from the top level) satisfies block-level power-density requirements. The same script and algorithm used for decap insertion at the block level can be used at the top level (when the algorithm is configured for use with rectilinear placement regions).
Top-level decap insertion is similar to inserting decaps at the block level. Adjust the decap density to reflect the estimated voltage drop requirements at the top level. Decaps required by the coupling of blocks at the top level are also analyzed and fixed with a top-level run.
Implementation details
You can use the native Milkyway axgSpreadGroupCells command to uniformly distribute decaps. Distances between the caps vary after the subsequent placement legalization. Decap insertion is done just after the detailed power-grid information is pushed down from the top-level design.
Reprints
