[Engineering Feature]
Stanch The Bleeding Of Leakage Power At 65 nm
Even as leakage overwhelms their power budgets, IC design teams are finding ways to plug the holes that are costing them dearly at sub-micron nodes.
Of course, all of the EDA industry's three large RTL-to-GDSII tool vendors have some form of an integrated flow that attempts to address low-power design. Magma Design Systems throws two tools in particular at the problem. Talus Power operates on the optimization aspect, spanning RTL to GDSII, while Quartz Rail performs both power analysis as well as static and dynamic voltage-drop analysis. The latter analyzes the impact of IR drop on delay and also performs thermal analysis.
"These tools work hand in hand," explains Arvind Narayanan, a Magma director specializing in low power. "If you do multi-VT optimization, the optimization engine has visibility into power, timing, and area." As with all integrated implementation flows, the ability to perform concurrent optimization has the best likelihood of delivering improved quality of results without multiple iterations.
Architecture matters It would seem counterintuitive to think that much could be accomplished at the architectural stage of the design cycle with regard to leakage management. ChipVision Design Systems is one EDA vendor that has targeted the architectural level for optimization. Earlier this year, it announced electronic-system-level (ESL) technology that lets RTL designers work interactively with systemlevel descriptions to generate power-optimized RTL code.
ChipVision also is part of a European initiative to control leakage power under the aegis of the OFFIS research and development consortium. The initiative, called Controlling LEAkage power in NanoCMOS SoCs (CLEAN), has a number of European industrial houses and research institutes among its members.
According to Wolfgang Nebel, ChipVision's chief technology advisor and CLEAN's scientific leader, the effort's objective is to find ways to reduce leakage for the current generation of process technology as well as for future generations.
"We've made substantial progress in understanding the potential of the lower- level techniques," says Nebel. "We've made good progress in modeling their impact at the higher levels. There's still work to be done to really apply all these techniques. The first of them are already used by the industrial partners in CLEAN."
The CLEAN development effort, which counts Infineon and STMicroelectronics among its industrial partners, began its three-year term in 2006 and will conclude by the end of 2008. Also, Nebel points to some pending CMOS technology improvements that should, in combination with high-k dielectrics, go a long way toward solving the gate-leakage problem (Fig. 3).
The next generation of CMOS technology, variously termed thin- or ultra-thin-body CMOS, will provide much better control over gate leakage, virtually eliminating it. In its initial appearance, expected in the 2010 timeframe, subthreshold leakage will also be substantially lower compared to bulk CMOS.
The long-term solution, Nebel believes, is dual-gate or FinFET technology, which the ITRS expects to appear with the 40-nm node in 2011. "FinFETs are named for how they'll look, standing vertically on the substrate rather than lying horizontally and looking something like a shark's fin," says Nebel.
FinFETs will be completely surrounded by a gate, providing much greater control over the channel. "FinFETs will take us back to the 'good old days' when the dynamic power consumption was the biggest contributor to the overall power budget," says Nebel.
FinFET technology is on the roadmap for at least one large systems house. According to Kazu Yamada, vice president and general manager of the Custom SoC business unit at NEC Electronics America, NEC's research and development laboratory is already working with FinFET.
"But when will we move to that technology is a moving target," says Yamada. "Five years ago, we thought it would be at 32 nm. Now, perhaps it'll come into play at 28 nm or 24 nm. And before then, there may be further breakthroughs that will allow us to hold off further."
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