SINGLE-SWITCH CONVERTER
There are several variations of SMPStopology chargers. The two most common are the single-switch converter (Fig. 3) and the synchronous switched converter (Fig. 4). Switched-mode converters work by varying the duty cycle (% on versus off) of the control switch (usually a MOSFET). An LC circuit filters this signal to produce the dc output. Current is measured by the voltage across RS:

V_OUT = pulse-width modulation (PWM) duty cycle (D) × V_IN

The waste heat dissipation is calculated by:

Dissipation = (D × R_DS(ON) × I_BAT²) + ((1– D) × V_DIODE × I_BAT) + ((R_S + R_Idc) × I_BAT²) + TL

where TL (transition loss) depends on the MOSFET capacitance, drive efficiency, and switching frequency. Transition loss calculation is complex and relatively small for low switching frequencies.

So for the aforementioned 0.8-A charge current example targeted at the linear regulator, a FET with 0.02-O R_DS(ON), a diode with 0.9-V forward drop, and an inductor with 0.002-O dc resistance results in:

D = (3.8 × 2)/12 = 0.63
Dissipation = (0.63 × 0.02 × 0.64) + (0.37 × 0.9 × 0.8) + ((0.47 + 0.002) × 0.64) = 0.008 + 0.27 + 0.3 = 0.58 W

Efficiency is 91% for 0.8-A charge current. If the charge current is 2 A, the loss increases to 3.3 W, and the efficiency is 83%.

The first loss factor is the on-resistance of the FET multiplied by the duty cycle percentage and the square of the current. Careful selection of a low on-resistance FET can minimize this factor. Yet “careful” is the operative word. As the charge current increases, R_DS(ON) loss goes up with the square of the current. So at 2 A, the current factor is 4, but at 4 A, it increases to 16!

The second main loss factor is the loss across the commutating diode. This diode provides a current path to the output when the control switch is off. To minimize loss in this circuit, select a control FET with minimum R_DS(ON), a diode with minimum forward voltage drop, and ensure that the duty cycle is high so the FET loss dominates. Consequently, on this type of charger, the input voltage should be only a bit higher than the maximum output voltage.

Continue to page 4

Reprints

Printer-Friendly

Email this Article

RSS

Submit PlanetEE del.icio.us Digg Reddit Newsvine StumbleUpon Netscape Yahoo MyWeb Live Bookmarks Fark  Submit

Font Size

What's This?

Network-On-Chip Tools Arrive for The Masses Tackling System Design Challenges Through Early Verification ESL Tools Take Center Stage As Designers Move Up Parasitic Extraction Tool Targets Next-Generation Custom ICs Synopsys Jumps Into ESL-Synthesis Pool Verify Control Systems Before Committing To Hardware You're Using How Many FPGAs? Tool Up For The FPGA Blitz

1) Build A Smart Battery Charger Using A Single-Transistor Circuit (181 views today) 2) Hot Hands For Some Cool Rock: Motion Sensing Meets Audio Engineering (168 views today) 3) What's All This Transimpedance Amplifier Stuff, Anyhow? (Part 1) (88 views today) 4) GPS-Derived Grandmaster Clock Delivers Ultra-Precise Time And Frequency Sync (75 views today) 5) Downconverting Mixers Lower Power Consumption While Improving Performance (61 views today) ALL TOP 20

Reader Comments gud Sangeeth S Kumar -April 09, 2009
POST YOUR COMMENTS HERE Name: Email:
Your Comments: Enter the text from the image below Please refresh the page if you have trouble reading this text.