[Design View / Design Solution]
Customize Power Supplies Freely With A Digital Feedback Loop
Digital signal controllers plus power-supply-friendly on-chip peripherals are the building blocks for an easy and cost-effective method of digital power conversion.
OPERATING MODE The next area to consider is the operating mode. Typically, analog designs operate with either a continuous inductor current or a discontinuous inductor current. Both options offer distinct advantages. A discontinuous current-mode design can maintain voltage regulation, even if the output current drops to zero. A continuous design utilizes smaller magnetics and maintains tighter control on the output-voltage ripple. Until recently, it hasn’t been possible to effectively combine these modes, due to their different feedback requirements.
However, a DSC’s programmable peripherals can be reconfigured on the fly while the design is operating. This means that a DSC-based design can switch between operating modes, switching to continuous mode when the output current is sufficient for stable operation and then switching to discontinuous mode when the output current drops too low.
While an analog design would certainly be able to perform a similar transition, it would require two feedback paths (one for each mode), and thus, there would be a momentary glitch at the transition. So, the DSC has the added advantage of requiring just a single feedback path. Due to the software basis of the feedback, it’s even possible to preload the storage elements of the feedback filter, avoiding the transition glitch (Fig. 2).
CONTROL METHODOLOGY The final design choice is the control methodology of the design—whether to use voltage- or current-mode control. Traditional analog SMPS designs use either of the two control techniques, with the final choice typically being driven by cost and available technology.
Voltage-mode control, which is the older method, was found in most early SMPS designs. It uses a ramp generator and a voltage comparator to translate the error signal from the error amplifier/ loop filter into a PWM pulse width. Simple voltage-mode control suffers from three basic limitations. First, there’s no current limiting to protect the circuit components. Second, it responds slowly to input or output transients. And third, it produces a feedback loop that’s inherently unstable.
Current-mode control is a better and safer control method, consisting of a dual-loop format. The inner current loop is designed to charge the inductor to a peak current specified by the outputvoltage loop. The outer loop is similar to the feedback loop of voltage-mode control in that it monitors the output, phase/ frequency-compensates the feedback, and regulates the energy transferred by the current loop.
Because the inner loop regulates the inductor current on a cycle-by-cycle basis, the inductor essentially has no memory of the previous pulse and doesn’t carry energy over from the previous cycle. It additionally offers peakcurrent protection for the transistors, eliminates “ratcheting” in the magnetic components, rejects input-voltage variation, and affords easy control-loop compensation.
An efficient implementation of currentmode control in digital SMPS designs lies in using a DSC that features an onboard PWM peripheral, which works in the same way as a current-mode PWM generator (Fig. 3). The difference lies in the output of the digital feedback. A voltage-mode design uses the feedback to directly control the PWM’s duty cycle. In a current-mode design, the comparator-based pulse-termination capability of the DSC’s PWM regulates the pulse width, based upon current feedback, and the output of a digital-toanalog converter (DAC) that’s driven by the digital feedback.
Current-mode control is implemented by calculating the SMPS design’s required PWM frequency and maximum duty cycle, and then configuring the PWM counter with these parameters. This sets the maximum duty cycle and pulse frequency of the system. Next, the design must adjust the reference DAC output to handle the expected maximum range of the current-feedback signal. In doing so, you will be able to provide the highest resolution in controlling the PWM duty cycle.
Finally, the specific proportional- integral-derivative (PID) software routine, required to control and stabilize the system, must be developed. This routine must provide the appropriate feedback for stability, based upon the voltage feedback from the ADC. Moreover, it must compare the feedback against its own internal digital reference and output the desired current setting to the DAC that’s generating the comparator reference (Fig. 3, again).
DIGITAL LOOP CONTROL A key factor to consider when using a DSC for an SMPS application is to ensure that the onboard PWM module provides adequate resolution for the power-supply design. The resolution and speed of the ADC onboard a DSC, which provides the system with status (feedback) to the control loop, should also have adequate resolution.
Next, it’s important to choose a DSC that has onboard analog comparators of sufficient speed for the pulse widths to be generated. ADCs could be used in place of the comparators for terminating the PWM pulse, but they would have to continuously monitor and process signals. This is a waste of processing power, since the monitored signal is merely being compared to a fixed limit. High-speed analog comparators free the processor and ADC to perform other, more valuable tasks, while enabling the DSC to perform powersupply fault and currentlimiting functions.
Furthermore, it’s useful to have a DSC with an ADC module that provides independent sample-and-hold circuits. This allows the DSC to sample multiple voltages or currents simultaneously and at precise times. As a result, even transitory signals can be sampled, and it helps reduce system costs. It’s even better if the ADC can sample asynchronously, because it can then support multiple control loops operating at different frequencies, such as a powerfactor- correction (PFC) circuit running at 70 kHz and a dc-dc conversion block running at 250 kHz.
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