It’s possible, but unlikely, that the initial RTL designer may wish to specify library cells by name for the various domain crossings. The RTL designer may rely on the physical design team, or in the future possibly rely on the synthesis tool, to select the appropriate cells. Nonetheless, special cases will arise in which some design team wishes to call out specific cells for the crossings. Both formats support this, as shown in section 4. The rules, as named in section 3, can be further expanded to specify cell names.
As noted earlier, UPF doesn’t provide any syntax to describe the pin names and function of the level shifter. In CPF, the “define_...” commands are used. Section 5 of the CPF shows how the level shifters would be specified.
Example 2: Simple Power Domain The second example design has one instance “u1” that can be powered down. Several outputs must be clamped to zero when powered down, but one output “zn” must be clamped to one instead. The signal “iso” activates the isolation logic. Code list 3 and Code list 4 show the CPF and UPF, respectively, for the design.
Section 1 is the same as the voltage domain example above. Section 2 shows the syntax for declaring clamp values. Both formats use a rule to “hang” this information so that later on, additional information can be “hung” from the same rule.
For CPF, the general information about the rule uses “-from domain.” For UPF, the same information is declared with “-domain domain -applies_to outputs.” Input side isolation would be declared similarly, with “-to” in CPF and “-applies_to inputs” in UPF. In both formats, a “default value” for clamp outputs can be defined, either by using a wildcard “*” (CPF) or by defining no elements (UPF). Exceptions such as zn are declared using a second rule that names the specific port(s) with a different clamp value.
Section 3 shows the syntax for declaring the isolation signal. In CPF, this is done with the same command. In UPF, the additional information is “hung” on the same rule with a later command. Both formats allow an expression to be used for the isolation signal.
Section 4 shows the syntax for declaring the required location in the design hierarchy for isolation gates. In some designs, the location of the isolation logic must be fixed. Most often, the isolation logic may be required to be in the powereddown (source) domain or the destination domain. Both formats use a “-location” flag for this, but the names of the legal values are different. CPF uses “from” and “to,” while UPF uses “self ” and “fanout.”
Example 3: Retention Registers This design illustrates several typical scenarios for retention registers. It has two power domains (Fig. 1). All of the registers in the first power domain, U1, must have retention. In the second power domain, U2, only registers in the sub-module U3 must have retention.
Retention registers come in at least two styles: “one-pin” registers with only a sleep pin, and “two-pin” registers with a separate save and restore pin. In this case, registers in U1 require save and restore controls, while registers in U2.U3 require a sleep control. Code list 5 and Code list 6 show the CPF and UPF, respectively, for the design. (Both skip the syntax already introduced.)
The concepts are very similar between CPF and UPF, but the distribution of the information differs slightly. For CPF, section 1, 2 shows that one command defines both the instances to be retained as well as the control net names. For UPF, the same concepts are split between two commands. In both formats, a “one-pin” retention control is specified by giving the same name for the save and restore nets. CPF allows active high or active low signals, while UPF also allows specification of edges.
Section 3 shows that both formats have a command to optionally map the retention requirements to specific cells or cell types. Future synthesis libraries may contain enough information to do this mapping. For now, though, the information can be defined using these formats.
Section 4 shows the CPF syntax to define the retention register. A retention register generally has two power-supply pins. One is for the retention operation, while the other is switchable.
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