[Design View / Design Solution]
Add Modular Plug-In Functionality To Any Embedded Design
By taking advantage of the latest 16-bit MCUs that offer flexible I/O pin mapping, designers can conceive efficient embedded designs by taking the modular plug-in approach.
FIXED AND FLEXIBLE I/O PINOUTS Many of the ills faced by compact and sophisticated embedded designs, such as a versatile card reader, can be traced to the fixed I/O pinouts of the MCUs. Previously, designers had no choice but to follow the MCU I/O pinouts defined by the vendors. Given the limitations in size and performance, it was natural that most MCUs featured multiple functions on their I/O pins in a multiplexed manner. On low-pincount MCUs, this multiplexing results in MCU resource-sharing problems—a common scenario where the required peripherals could be found multiplexed on the same I/O pins, rendering them mutually exclusive.
Now let’s flip the MCU I/O pinout problem on its head. How about making the I/O pinout on the MCU flexible? This feature will at once enable designers to route the needed functionality directly to the appropriate pins. Flexible I/O pin mapping today is available from a few MCU vendors. This flexibility allows us to reimagine the same card reader as a plug-in module based on an MCU that offers flexible I/O pin mapping, such as the Microchip PIC24FJ64GA004 MCU (Fig. 3).
To serve as a card-reader interface, a 24-line bus that caters to different types of storage cards can be brought out from the MCU. Using the flexible pinout feature, this design can be comfortably routed and implemented to handle a 24-line bus, as well as a USB interface to the host using a USB-toserial converter.
Using an MCU that offers flexible I/O pin mapping results in a simpler interface for a card-reader design that can handle multiple flash card formats. The beauty of this design rests on the fact that UART, I2C, SPI, and analog and parallel peripherals can all be made to communicate over the same bus, with minimal I/O pin investment. This allows for the use of MCUs in 28-pin or 44-pin versions and 8- by 8-mm packages or smaller to help conserve space. Higher-pin-count MCUs typically require 12- by 12-mm or larger packages.
HOW TO DETECT NEW CARDS To detect new cards presented to the main controller, you have to invest a few I/O lines to implement the functions of identification and safe insertion/removal of new plug-in cards. One option is to use serial communications to read an ID from the plug-in module. Another option is to detect certain pull-up and pull-down resistor combinations on the module. The third option is to use an analog-to-digital converter (ADC) to detect the change in value of a pull-up resistor—using different resistors for each board type.
An important aspect of plug-in functionality is safety first, at all times. Designers must ensure the safe insertion and removal of cards and prevent electrostatic discharge (ESD) when connecting and disconnecting the module from the main system. This can be done by removing power from the bus when the plug-in cards are idle.
Note that in our flash card reader example, the previously mentioned methods of card detection may not work. We’re limited to the specs of the flash cards themselves. So, how can card detection be done? In most cases, the cards’ specifications define the detection system. Secure Digital card sockets have a switch that makes a connection when inserting a card. Compact Flash has a card detect line that pulls a pin low when inserting a card. Note that these pins should be included in the card interface when specifying the bus width for each card type.
I/O PIN MAPPING—IMPLEMENTATION ISSUES Pin-remapping MCUs provide both low cost and high flexibility. Such MCUs are less restrictive as to what can be used on the plug-in port. MCU vendors have implemented the flexible I/O pin-mapping feature in different ways. Given the possible I/O pin-mapping permutations, such as one-to-many, many-to-one, or many-to-many, MCU vendors need to tread carefully. With the flexible I/O feature, it’s simple to define two separate output functions onto the same pin. However, this assignment can result in an output short. In another instance, a bus contention results when the designer mistakenly connects two physical pins to same input function.
PRIORITY-BASED I/O PIN MAPPING In one method, the MCU’s flexible I/O pin mapping is subjected to a priority-encoding system. Here, each peripheral or function has a pre-defined priority. In this I/O pin-mapping system, the highest-priority MCU peripheral always occupies the initial sets of pins, followed by the lower-priority peripherals that claim the remaining pins, and so on down the configuration chain. This priority scheme avoids design violations by restricting only one function to one remappable pin, based on priority.
The highest-priority function is fixed on one pin, while the lower-priority function can be moved to many pins. Most commonly, the pin assignment is controlled by some Special Function Registers (SFRs). A control bit makes it possible to enable or disable a function. When enabled, a function—based on its priority in relation to the priority of other functions—will appear on one I/O pin.
While still more flexible than a fixed I/O MCU, this design approach limits the designer’s freedom to route I/O freely. That’s because you can only select from one of the many predefined MCU I/O pinouts.
MULTIPLEXER-BASED I/O PIN MAPPING In the other flexible-pin-mapping implementation, designers can route any input or output to any of the I/O pins. This approach relies on pin-definition interfaces based on SFRs. These hardware flexible-pin-mapping configuration registers prevent the aforementioned design violations, while allowing for true I/O remapping with one-to-many, many-to-one, or many-to-many relationships.
Some MCU vendors also provide the capability to prevent accidental changes to I/O configurations. To assist in this endeavor, the configuration register may be locked; it can only be unlocked for a small duration via a special key sequence. Some vendors provide an additional level of protection by shadowing the configuration and SFRs and constantly verifying hardware integrity. These measures help to prevent accidental I/O changes that can occur due to EMC events or abrupt power changes.
Reprints
