Setting reset causes the last value in the counter to be latched for output. The integrator is also zeroed to remove any residue from the previous sample. When reset goes low, the integrator is released, allowing the incremental converter to generate a density signal. This is used to gate the counter.
The number of clock cycles between the release and setting of reset determines the resolution. 256 cycles allows for an 8-bit value. 4096 cycles allows for a 12-bit value. With a 1-MHz clock, an 8-bit sample would have an output rate of no more than 3.9 ksamples/s while a 12-bit sample’s rate would be no more than 244 samples/s.
For each doubling of the resolution, the output rate goes down by a factor of two. This is expressed as 6 db per octave or 20 db per decade. (Both 6 dB and octave are fancy ways of saying 2 while 20 db and decade are just different ways of saying 10.)
INCREMENTAL LIMITATIONS 6 dB per octave just isn’t a very good resolution/sample rate tradeoff. With a 1-MHz clock, the output rate for 16-bit resolution is 15 samples/s and 1 sample/s for 20-bit resolution (multimeter-type performance). At 24 bits, it goes down to 3.5 samples per minute. If these sorts of resolutions with their corresponding sample rates are adequate for your design, an incremental converter would be a good choice. They have the advantage of design simplicity and minimal analog components. If not, different techniques need to be developed.
Here’s something that’s fun. I built an incremental modulator using three passive components, an op amp, a comparator, and a flip-flop. It could have been done with only the passive components and a flip-flop. Remove the op amp and build a passive RC low pass filter. Connect this filter’s output to the flip-flop’s input. The logic threshold hold level acts as a poor man’s comparator.
Connect the inverting output of the flip-flip to the filter output. As the cap charges, its voltage increases until it exceeds the logic threshold and the flip-flop’s output goes high. With the inverted input now low, the feedback resistor discharges the cap, causing it to go low. It ain’t elegant, but it will win a bar bet.
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