[Design Application]
Noise Reduction Is Crucial To Mixed-Signal ASIC Design Success
Understanding the problem and possible solutions helps designers produce ICs in which noise performance doesn't hamper functionality.
Analog signals can tolerate some high-frequency noise if the circuits are low bandwidth. This includes dc bias controls, or any signals with frequencies less than the system clock. So, using minimum-bandwidth circuits helps avoid amplification and retransmission of switching noise.
High-frequency noise can pass through any circuit without gain due to direct coupling through the circuit's parasitic elements. Passive low-pass filters (LPFs) at circuit inputs will help reduce this. The LPF is most effective when the cutoff frequency is less than the system clock's fundamental frequency. High-bandwidth circuits are more susceptible to noise, especially if they can pass frequencies that include system clocks and their harmonics.
Whenever possible, try to keep the IC's sensitive signals internal. Going outside of the chip opens up more opportunities for noise degeneration of the signals.
Analog signals will be less noise sensitive when kept as large as possible in amplitude. This translates directly into SNR improvements. Microvolt amplitude signals aren't easily processed in a CMOS mixed-signal environment. Small amplitude signals are often dealt with in an all-analog LNA or a preamplifier circuit.
Pay special attention to high-gain circuits, which will usually be more noise sensitive. Examples of this type include op amps and comparators. These should be bandwidth limited, and carefully placed and connected. Hysteresis is suggested for comparators.
Power, Ground, And Substrate Stability Low-impedance connections for power and ground usually provide quieter power supplies. Keeping digital and analog powers and grounds separated should improve power/ground noise. Additionally, transition-switching noise is undesirable on analog-circuit power.
Spice simulations often use an ideal voltage source to represent the system power. Simulations show quiet power, even when high surge currents are present. In actual silicon, these circuits will have some impedance and, hence, noise problems.
Internal power filters are especially valuable for high-frequency noise. Analog-circuit layouts can have empty locations "filled" with power-supply filter capacitors. Stacking power and ground interconnects provides metal plate capacitors. Filters can be placed under interconnect areas or beneath power rails by taking a 3D approach to the layout. Metal interconnect areas are often sizable, and the layers underneath them can be used for power filtering. This method can provide sizable internal filter capacitors without increasing the IC size.
Power/ground stability serves as a foundation for reducing substrate noise. If the ground is stable and has low impedance, the substrate can be extensively grounded, thereby reducing substrate noise.
Design rules for substrate contacts are specified to cover latch-up protection issues, but they aren't defined to deal with noise concerns. As a result, the required amount of substrate contacts are usually insufficient to deal with substrate noise.
For p-substrate, n-well CMOS, a substrate contact, or tie-down, consists of a p+ area in the substrate that's connected to ground. The p+ region is heavily doped and has a much lower resistance than the substrate. The heavily doped area also makes contact with the metal layer that provides the ground connection.
Substrate noise should de-crease with the employment of grounded substrate contacts. Grounded contacts should be distributed extensively in the circuit layout, closely surround all noise generators, and surround all noise receivers.
A grounded contact's close proximity to noise generators is valuable in order to "absorb" carriers before they are allowed to go deep into the substrate. In a similar fashion, the n+ tie-ups used in the PMOS and n-well areas can be extensively tied to the positive power (Fig. 3).
Furthermore, guard rings are used to localize noise effects and coupling through the substrate. Some stability is provided relative to the local power/ground used to bias the rings. Guard rings can be implemented to both "suppress the talker" and "isolate the listener."
Guard rings consist of connections to both power and ground. For p-substrate, n-well CMOS, the grounded guard ring uses a low-resistance p+ area to connect to ground. A guard ring that connects to the power uses an n-well and n+ region on the substrate. This provides two stable connections that help reduce noise coupling through the substrate (Fig. 4).
Positive n+ connections attract electrons, and the grounded p+ connection attracts holes. The guard ring attempts a barrier to noise coupling. These can be placed closely around the noise source and "receiver" circuits that require noise shielding. The desired effect is noise reduction from the source and at the receiver.
But, these rings don't offer a perfect solution. Typically, their depth is about one micron, and noise and substrate current can go under the rings. For this reason, close proximity to noise sources is important.
One fundamental rule is that digital and analog signals be kept away from each other. Digital outputs from analog cells should be separated from the analog inputs too. For ADCs, DACs, comparators, and similar mixed-signal devices, analog and digital signals should be routed to opposite ends of the device.
Shielding can be used to limit noise coupling of metal interconnects within noisy environments (Fig. 5). Shields are employed to pass analog signals through an area that has digital noise, and to pass noisy signals through an area that needs to remain quiet.
To be most effective, the shields must be connected at the noise-sensitive receiver. The intention behind doing this is to keep the noise level low, as referenced to the susceptible receiver. Connecting the shield at only one end reduces transient currents in the shield.
For ground-referenced signals feeding into the receiver, the shield is grounded at the receiver. Some signals are referenced to the power, and in those cases, the shields are usually connected to the power. Avoiding long interconnects on any analog signal is generally a good strategy to observe.
Some analog circuits can be noise generators as well, and they must be examined on a case-specific basis. Look for transition switching, high voltage or current transients, and similar items. These circuits can be problematic when placed in the proximity of low-amplitude or high-gain analog circuits.
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