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Excess energy waste during battery charge is, of course, a bad idea for the environment and poor design practice. In fact, the problem has deepened to the point where it’s now an international regulatory agency issue. Battery-charger efficiency is more challenging to specify and measure than ac-dc power-supply conversion efficiency. It’s usually understood as the amount of energy stored in the battery relative to the energy consumed by the charger during the charge cycle.

But that isn’t a good definition, because battery chargers are often left powered when batteries aren’t actively charging. Power consumed during idle or battery-charge maintenance must also be considered.

When power supplies only need a measurement of the ac power-in and the dc power-out at maximum and zero rated load and at zero load conditions, battery-charger efficiency can’t be measured that easily. Charger efficiency standards are based on summing energy consumption during a specific period of time that includes active charge, maintenance of charge, and standby mode with no battery in the charger.

For example, the Energy Star measurement cycle starts after the battery has been on-charge for 24 hours. At that point, it’s assumed that it has reached full charge. Then, the energy consumed to maintain full charge on the battery is measured for 36 hours with the battery in the charger and an additional 12 hours with the battery removed.

An energy ratio (ER) is calculated by dividing the energy measured in the 48-hour non-active period by the energy that can be extracted by fully discharging the battery. The Energy Star standard contains a table of the acceptable values of ER relative to the battery voltage, with a maximum ER of 20 for 1.2-V batteries to an ER of 3 for batteries of 24 V or higher.

Obviously, the Energy Star standard doesn’t include the conversion efficiency of the charger during active charge, only during charge maintenance and standby modes. The rationale behind this is the observation that most consumer-market battery chargers sit powered but empty or with fully charged batteries inserted for much of their life.

Looking ahead, the California Energy Commission (CEC) and the U.S. Department of Energy (DOE) are both developing standards that include active charge mode efficiency. The DOE mandatory standard is scheduled for publication in 2008 and will be in force by 2011. The CEC spec will either be published sooner or will just tie into the DOE spec.

Also, most chargers have an ac-dc power supply, either embedded inside the charger or as an external desktop unit. These supplies are already subject to the CEC and Energy Star power-supply efficiency standards and will be regulated by the future DOE standards.

CHARGER TOPOLOGIES, CONVERSION EFFICIENCY
Most ac-powered battery chargers are designed as offline or two-stage switched-mode power supplies (SMPS) with special controls. Some dc-powered chargers use linear regulation, but they’re generally limited to low-power products (Fig. 1).

Of course, the linear and SMPS charger topologies also accept dc power directly from a generator or backup battery system. These types of chargers must have input protection and switching topologies to accommodate the voltage transients and wide voltage range found in those environments. The offline charger topology is limited to a single-battery charger, since each battery-charger output must be voltage- and current- controlled per the charge state of the associated battery.

THE AC-DC SUPPLY AND OFFLINE CHARGERS
There are two major subcategories of ac-dc power supplies: open-frame or brick supplies intended for building into other systems, and packaged desktop or wall-mount supplies. Battery chargers use both types.

Most ac-dc supplies employ a flyback topology, but there are many variations. In a flyback design, the ac line input is rectified to a high-voltage dc, which is then switched as current pulses onto the primary winding of a transformer by one or more MOSFET transistors.

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The resulting current pulses on the secondary winding of the transformer are rectified and filtered. They provide the dc output. The output voltage is regulated by varying the duty cycle or frequency of the pulses on the transformer primary. Control feedback from the secondary to the primary is completed via optoisolators to preserve galvanic isolation.

To satisfy CEC efficiency requirements (and the proposed DOE regulations), acdc supplies with load capacity greater than 45 W must exhibit better than 85% efficiency and consume less than 0.5 W with no load on their output. The spec includes an equation for supplies with higher capacity. In addition, ac-dc supplies with over 75-W capacity require power factor correction (PFC). PFC circuits can reduce conversion efficiency.

If an offline switching topology is used in a single-bay battery-charger design, the main challenge is tight voltage control. Near the end of the charge cycle, a lithiumion (Li-ion) battery charger must maintain a constant voltage across the battery with ~1% tolerance.

For example, a typical single-cell charger maintains 4.2 V ±0.05 V across the battery until the current decreases to a small value to finish the charge cycle. It’s more difficult to achieve this tight voltage control in an offline switching supply than with, for example, a dc-dc buck-converter topology.

One must accomplish both current and voltage control in a Li-ion battery charger during portions of the charge cycle. This is easier to design in a dc-dc converter. On the other hand, a single-stage offline switching charger may have a higher efficiency than an ac-dc supply followed by a buck-converter charger.

Linear regulation is the cheapest and least complex of the charger circuit topologies in general use (Fig. 2). However, because it generally has the lowest conversion efficiency of the charger topologies, it’s typically used only for low-power chargers. The waste heat produced by this circuit is calculated by:

Dissipation = V_Q1 × I_BAT + R_SNS × I_BAT²

Take the case of a 2S (two cells in series) Li-ion battery with a nominal 3.8 V across each cell. When charging at 0.8 A, with a 12-V dc supply, its dissipation is:

Dissipation = (12 – 3.8 × 2) × 0.8 + 0.2 × (0.82) = 3.52 + 0.128 = ~3.6 W

The conversion efficiency of this charger in active mode is a modest 62.5%, or 6 W into the battery divided by (6 W + 3.6 W) at the input. The voltage drop across the pass transistor, multiplied by the charge current, is the primary loss factor. That’s why linear regulated chargers, though simple, are only useful for low charge currents or when the input dc and battery voltages are similar. Also, the battery voltage must always be lower than the input voltage.

Most circuit designers have used linear- mode converters for constant-voltage power supplies. The only real difference between a constant-voltage output linear power supply and a charge controller—a resistive shunt is added to regulate battery current, and more algorithms are implemented in the controller to control battery voltage and current profiles during charge. Also note that this controller, and most charge controllers, sense battery temperature and include trip points in the control algorithm to shut down or limit charge current at high and low temperature points.

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SINGLE-SWITCH CONVERTER
There are several variations of SMPStopology chargers. The two most common are the single-switch converter (Fig. 3) and the synchronous switched converter (Fig. 4). Switched-mode converters work by varying the duty cycle (% on versus off) of the control switch (usually a MOSFET). An LC circuit filters this signal to produce the dc output. Current is measured by the voltage across RS:

V_OUT = pulse-width modulation (PWM) duty cycle (D) × V_IN

The waste heat dissipation is calculated by:

Dissipation = (D × R_DS(ON) × I_BAT²) + ((1– D) × V_DIODE × I_BAT) + ((R_S + R_Idc) × I_BAT²) + TL

where TL (transition loss) depends on the MOSFET capacitance, drive efficiency, and switching frequency. Transition loss calculation is complex and relatively small for low switching frequencies.

So for the aforementioned 0.8-A charge current example targeted at the linear regulator, a FET with 0.02-O R_DS(ON), a diode with 0.9-V forward drop, and an inductor with 0.002-O dc resistance results in:

D = (3.8 × 2)/12 = 0.63
Dissipation = (0.63 × 0.02 × 0.64) + (0.37 × 0.9 × 0.8) + ((0.47 + 0.002) × 0.64) = 0.008 + 0.27 + 0.3 = 0.58 W

Efficiency is 91% for 0.8-A charge current. If the charge current is 2 A, the loss increases to 3.3 W, and the efficiency is 83%.

The first loss factor is the on-resistance of the FET multiplied by the duty cycle percentage and the square of the current. Careful selection of a low on-resistance FET can minimize this factor. Yet “careful” is the operative word. As the charge current increases, R_DS(ON) loss goes up with the square of the current. So at 2 A, the current factor is 4, but at 4 A, it increases to 16!

The second main loss factor is the loss across the commutating diode. This diode provides a current path to the output when the control switch is off. To minimize loss in this circuit, select a control FET with minimum R_DS(ON), a diode with minimum forward voltage drop, and ensure that the duty cycle is high so the FET loss dominates. Consequently, on this type of charger, the input voltage should be only a bit higher than the maximum output voltage.

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SYNCHRONOUS SWITCHED BUCK CONVERTER
A synchronous switched charger replaces the commutating diode with a FET to reduce loss (Fig. 4). This, of course, makes the control a bit more complex:

PWM duty cycle (D) = V_OUT/V_IN

Dissipation = (D × R_DS(ON)¹ ×I_BAT²) + ((1 – D) × R_DS(ON)² × I_BAT²) + ((R_S + R_Idc) × I_BAT²) + TL

TL (transition loss) depends on FET capacitance, drive efficiency, and switching frequency, and we’re again ignoring that in this analysis. So for the 0.8-A charge current example, two FETs with 0.02-O RDS(ON) and an inductor with 0.002-O dc resistance you get:

D = (3.8 × 2)/12 = 0.63
Dissipation = (0.63 × 0.02 × 0.64) + (0.37 × 0.02 × 0.64) + ((0.47 + 0.002) × 0.64) = 0.008 + 0.0047 + 0.3 = 0.31 W

In this topology, the main loss is in the inductor and shunt, and the overall efficiency is improved by almost 50% over the single-FET switch topology. If the charge current is 2 A, dissipation is ~2 W and efficiency is 89%. This efficiency improvement becomes essential when the charge current is high and if the input voltage is much higher than the output voltage.

For example, on a single-cell Li-ion charger with a 12-V dc power supply and a 2-A charge current, the duty cycle decreases to ~0.3 and the loss in the single FET topology is ~3.2 W, with the diode accounting for about 40% of the loss. The loss in the synchronous converter is about 2 W, a greater than 60% improvement.

SEPIC ARCHITECTURE
The single-ended primary inductor converter (SEPIC) is one topology that can be used in chargers when the power input voltage can be either above or below the battery voltage. This occurs often when an automotive 10- to 32-V supply is used to power the charger and the battery has multiple cells in series. SEPIC converters have two switching inductors (L1 and L2 in the diagram) and are a bit complex to analyze (Fig. 5). The output voltage is determined by:

V_OUT = V_IN × (D/(1 – D))

where D is the duty cycle of S1. And as you can see, at a duty cycle of 50%, V_OUT = V_IN. If D is less than 50%, V_OUT will be less than V_IN and if D is greater than 50%, V_OUT will be greater than V_IN.

The major efficiency factors in a SEPIC converter are the loss in the two inductors, loss in the SEPIC capacitor (C1), the on-resistance of the switch (usually an N-channel MOSFET), and the voltage drop across the diode. In addition, the loss due to ripple current in the input and output capacitors must be considered.

In general, a SEPIC converter is less efficient than a synchronous buck converter. But a synch FET can replace the output diode to reduce that loss factor. This makes the converter a bit more complex to control, though. Winding both inductors on the same magnetic core can reduce output ripple current as well as loss in the capacitor.

TRANSITION LOSSES
Transition loss occurs in all switchedmode power supplies and chargers, and it’s the energy lost due to switching the FETs. When switching frequency and charge current are low, transition loss may be small enough to ignore in the design analysis. But as these factors increase, it becomes significant and must be analyzed. Transition loss in a FET can be approximated by:

Loss (W) = 0.5 × V_DS × F_SW × I_DSPK × (tsw_ON + tsw_OFF) where:

F_SW = switching frequency (in Hz)
I_DSPK = Peak drain/source current in the FET
V_DS = voltage switched (drain/source)
tsw_ON = gate turn-on time
tsw_OFF = gate turn-off time

Transition loss grows with increased switching frequency. However, the size of the inductor and ripple reduction capacitors decrease as the frequency increases. In most chargers, physical size matters less, and you want to use the minimum switching frequency allowed by the choice of the inductor (usually 120 to 300 kHz).

But in chargers where the component size is a major design factor and FET capacitance can be minimized, designs using up to 1.2 MHz are common. Also note that the proper choice of FETs to minimize transition time is essential for low transition loss. However, as the current-handling capability of a FET increases, the capacitance and transition times also increase.

Therefore, a fast FET in an SO-8 package that can handle 10 A may have minimal transition loss. Still, a FET in a TO-220 package that can handle 50 A will be quite a bit slower, and transition losses may become a significant design factor. The transition loss calculation shown above assumes use of a FET gate driver with enough capacity. If this isn’t the case, tsw (on or off) will increase, increasing the loss. Gate-drive current requirements can be approximated by:

I_GATE = (C_ISS × V_GATE)/tsw

where:

C_ISS = FET input capacitance

V_GATE = gate voltage
tsw = on or off transition time

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The gate-drive current requirement increases with decreasing tsw. If the gate driver can’t deliver the required current to minimize on or off transition time, efficiency will suffer. IC designers have come up with FET packaging and IC designs specifically for SMPS applications. Most of the time these are N-channel FETs, which feature very low capacitance, very fast turn on and off, and low R_DS(ON) specs. It pays to look through the selection guides on vendor Web sites to find the switching FETs that match your design requirements.

OTHER EFFICIENCY FACTORS
When analyzing the power loss in your battery charger, don’t ignore items that aren’t directly in the power-input to battery conversion path. The power consumption of some of these items can add up quickly.

The power to drive LED indicators is small per device, but can add up to a substantial total in a multibay battery charger. For example, if the charger supports six battery charge bays, and each bay has one status LED and five charge-state LEDs in a bar-graph arrangement, the entire charger powers 36 LEDs. If each of these LEDs is lit with 10 mA of current, drawn from a 12-V dc supply, they consume ~3.5 W when they’re all lit. One can reduce the power to the LED indicators by using highintensity devices and lower current, pulsing the LEDs, and turning off non-essential indicators when charge is complete.

A fan can be used in the charger to move hot air out of the enclosure and keep it away from the battery being charged. Of course, the fan itself and its associated drive and control circuits also consume power. Use thermostatic control to turn the fan off when it’s not needed and/or to modulate the fan RPM relative to the battery or enclosure temperature.

Many chargers use microprocessors for control, and these ICs usually require a 3.3- or 5-V dc power supply. The efficiency of this supply should be considered in the overall charger efficiency calculation.