[Electronica News]
Sigma-Delta ADC Optimize Bandwidth And Resolution

ED News Staff
ED Online ID #20171
November 20, 2008

 

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Touting the industry’s best combination of operating frequency, dynamic range, and signal-to-noise ratio (SNR), the 16-bit AD9261 and AD9262 analog-to-digital converters (ADCs) and the AD9267 continuous-time sigma-delta (CTSD) modulator from Analog Devices, Inc, couple low noise and high dynamic range with a bandwidth up to 10 MHz.

The ADC family employs what the company calls a breakthrough CTSD converter technology that suits wireless infrastructure, medical, and other high-performance equipment. The AD926x family relies on the principles of over sampling, noise shaping, and input characteristics unique to its architecture to achieve high levels of performance and ease of use. Features include an 86-dB dynamic range for an input signal bandwidth of up to 10 MHz, an on-chip phase-locked-loop (PLL) clock multiplier, decimation filters, and output data rates between 30 Msamples/s and 160 Msamples/s.

Additionally, power consumption ranges from 150-mW per channel to 350-mW per channel. The AD926x CTSD ADC family is sampling now and will be available in volume production in April 2009. Prices range from $28 to $48 each/1,000.

Analog Devices
www.analog.com


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