Adam Traidman is president of GigaScale IC/ChipEstimate.com, Cupertino, Calif. He received a BS in computer engineering from Rensselaer Polytechnic Institute, Troy, N.Y. He has held technical and management positions at Hier Design, Adaptec, and Monterey Design Systems, among others. Email address: adam@gigaic.com
4 results found for Adam Traidman, displaying items 1 - 4
April 27, 2007[Technology Report] Connecting Security IP Decisions To Chip Cost
Until recently, security implementation in software has been virtually the only option available to design teams, as specific hardware implementations haven’t been readily available on the open market. In addition, many design teams believed they had processing power to spare. The excess power remaining on an embedded processor has been allocated to handle algorithms, including common encryption or decryption routines. But this is changing with the introduction of security IP....
March 16, 2006[POV: Point Of View] Choice Of Process, Library Gets Complex At 130/90 nm
Gone are the days when "just get it right" summed up the job. Today, chips have to be right, cheap, and done yesterday. When developers search for shortcuts, they invariably choose the path of least resistance. To save time and mitigate risk, design teams gravitate toward familiar intellectual-property (IP) and process options and opt for the "free libraries" or "generic" fabrication technology. But as teams migrate to shrinking technology nodes, technical decisions become more...
November 11, 2005
[Web Exclusive] The Key To Estimating Final Chip Cost
One of the bleaker urban legends has it that a latchkey kid came home from school one day to find the locks on the house changed, the family moved, and no forwarding address in sight. Perhaps IC designers who once held the key to estimating final chip cost can relate as they gradually discover that, in effect, the locks have been changed...
February 3, 2005[Technology Report] The Keys To Achieving Power Integrity
Understanding the factors that account for total IC power consumption is crucial when designing a modern, power-efficient chip. As a designer, you must strike a balance among design styles, available IP choices, and process and manufacturing options to satisfy the power requirements of your final system. TIP 1: CHOOSE THE RIGHT IP LIBRARY AND PROCESS VARIANT. Choosing a technology node, process variant, and IP library can be daunting for...