Pete McCrorie is repsonsible for DFM product marketing at Cadence Design Systems Inc., San Jose, Calif. He holds a master's in physics and electronics from the University of Liverpool, United Kingdom. Email address: petemc@cadence.com Web site: http://www.cadence.com
3 results found for Pete McCrorie, displaying items 1 - 3
March 5, 2009
[Analog/Mixed-Signal Design] Break Out Of The Mold To Address Your Mixed-Signal Design Challenges
Mixed-signal design isn’t new. But as designs continue to get larger and more complex, with ever increasing amounts of digital and analog content, design implementation is getting more challenging. Traditional physical implementation methodologies are failing to provide efficient solutions for these advanced mixed-signal products, prompting new requirements that will be necessary for future generations of designs.
July 6, 2006[Design View / Design Solution] Glossary
Clock gating: Switching off the clock to flip-flops if the transition during clocking results in the same value. Dynamic Voltage Frequency Scaling (DVFS): Change both the voltage and frequency of a logical block during operation based on the task it performs to produce a cubic power reduction. Isolation cells: Prevent physical damage to sections of the IC that interface to power switch-off modules. ...
July 6, 2006[Design View / Design Solution] Save Those Watts With A Power-Aware Design Flow For SoCs
At a time when a single data center may consume more power than millions of homes1, it's easy to see that power consumption has become critically important for all designs—not just battery-powered products. Leakage power now dominates 90- and 65-nm devices, and high power consumption imposes ever more severe heat and performance penalties. Of course, the chip-or system-level power requirements are in addition to the perennial requirements of higher performance,...
